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公开(公告)号:US20150255287A1
公开(公告)日:2015-09-10
申请号:US14640668
申请日:2015-03-06
Applicant: Renesas Electronics Corporation
Inventor: Kenichi SHOJI , Yoshinori KONDA , Yuki OTA , Keiji OKAMOTO , Yuichi SUZUKI , Shutaro TSUCHIMOCHI , Kengo MATSUMOTO , Kazuyuki OZEKI
IPC: H01L21/266 , H01L21/3213 , H01L21/8234 , H01L21/311
CPC classification number: H01L21/266 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/823418 , H01L21/823456 , H01L27/11546 , H01L27/11573
Abstract: To improve characteristics of a semiconductor device.An element isolation region is etched by using a photoresist film as a mask, and thereby a p-type well that is a layer under the element isolation region is exposed. Thereafter, deposit over a surface of the photoresist film is etched. Then, a source region is formed by implanting impurity ions into the exposed p-type well by using the photoresist film as a mask, and thereafter, the photoresist film is removed. Thereby, it is possible to prevent a hardened layer from being formed due to injection of impurity ions into the deposit over the surface of the photoresist film. As a result, it is possible to suppress a popping phenomenon when the photoresist film is removed, so that it is possible to prevent a pattern of a gate and the like from being broken.
Abstract translation: 改善半导体器件的特性。 通过使用光致抗蚀剂膜作为掩模蚀刻元件隔离区域,从而露出作为元件隔离区域下方的层的p型阱。 此后,蚀刻在光致抗蚀剂膜的表面上沉积。 然后,通过使用光致抗蚀剂膜作为掩模,通过将杂质离子注入曝光的p型阱中形成源区,然后除去光致抗蚀剂膜。 由此,可以防止由于将杂质离子注入到光致抗蚀剂膜的表面上的沉积物中而形成硬化层。 结果,当除去光致抗蚀剂膜时,可以抑制爆裂现象,从而可以防止栅极等的图案被破坏。
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公开(公告)号:US20160365278A1
公开(公告)日:2016-12-15
申请号:US15147591
申请日:2016-05-05
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kiyoshi MAESHIMA , Kotaro HORIKOSHI , Katsuhiko HOTTA , Toshiyuki TAKAHASHI , Hironori OCHI , Kenichi SHOJI
IPC: H01L21/768 , H01L23/532 , H01L21/321 , H01L23/528 , H01L21/311 , H01L21/3205
CPC classification number: H01L21/76879 , H01L21/0206 , H01L21/02074 , H01L21/0209 , H01L21/0273 , H01L21/31144 , H01L21/3212 , H01L21/76808 , H01L21/76832 , H01L21/76834 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53295 , H01L29/66477 , H01L29/6659
Abstract: It is to provide a manufacturing method of a semiconductor device including the following step of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 μg/m3 and less.
Abstract translation: 提供一种半导体器件的制造方法,包括以下步骤:在后表面上制备具有氮化硅膜的半导体衬底; 在所述半导体衬底的主表面上形成具有通孔的层间绝缘膜; 以及在所述通孔内选择性地形成通孔填充物。 该方法还包括以下步骤:执行晶片后表面清洁以暴露形成在半导体衬底的后表面上的氮化硅膜的表面; 然后在半导体衬底的主表面上的层间绝缘膜和通孔填充物上形成由化学放大型抗蚀剂制成的光致抗蚀剂膜,其中半导体衬底在铵离子浓度为1000μg的气氛中储存 / m3以下。
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公开(公告)号:US20170358489A1
公开(公告)日:2017-12-14
申请号:US15670867
申请日:2017-08-07
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Kiyoshi MAESHIMA , Kotaro HORIKOSHI , Katsuhiko HOTTA , Toshiyuki TAKAHASHI , Hironori OCHI , Kenichi SHOJI
IPC: H01L21/768 , H01L29/66 , H01L21/321 , H01L23/532 , H01L21/311 , H01L21/02
CPC classification number: H01L21/76879 , H01L21/0206 , H01L21/02074 , H01L21/0209 , H01L21/0273 , H01L21/31144 , H01L21/3212 , H01L21/76808 , H01L21/76826 , H01L21/76832 , H01L21/76834 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53295 , H01L29/66477 , H01L29/6659
Abstract: It is to provide a manufacturing method of a semiconductor device including the following steps of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 μg/m3 and less.
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