公开(公告)号：US20170372876A1

公开(公告)日：2017-12-28

申请号：US15498298

申请日：2017-04-26

Applicant: Renesas Electronics Corporation

Inventor： Kotaro HORIKOSHI

IPC: H01J37/32 ,  H01L21/683 ,  H01L21/67 ,  H01L21/687

CPC classification number: H01J37/32697 ,  H01J37/3178 ,  H01J37/32715 ,  H01J37/32788 ,  H01J2237/0206 ,  H01J2237/18 ,  H01J2237/334 ,  H01L21/67017 ,  H01L21/67069 ,  H01L21/6831 ,  H01L21/68707 ,  H01L21/68742

Abstract: A manufacturing method of a semiconductor device includes the steps of: (a) placing a semiconductor wafer over a stage provided in a chamber, the pressure in the inside of which is reduced by vacuum pumping; and (b) after the step (a), forming plasma in the chamber in a state where the semiconductor wafer is adsorbed and held by the stage, so that desired etching processing is performed on the semiconductor wafer. Herein, before the step (a), O2 gas, negative gas having an electronegativity higher than that of nitrogen gas, is introduced into the chamber to form O2 plasma in the chamber, thereby allowing the charges remaining over the stage to be eliminated.

公开(公告)号：US20160365278A1

公开(公告)日：2016-12-15

申请号：US15147591

申请日：2016-05-05

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi MAESHIMA ,  Kotaro HORIKOSHI ,  Katsuhiko HOTTA ,  Toshiyuki TAKAHASHI ,  Hironori OCHI ,  Kenichi SHOJI

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/321 ,  H01L23/528 ,  H01L21/311 ,  H01L21/3205

CPC classification number: H01L21/76879 ,  H01L21/0206 ,  H01L21/02074 ,  H01L21/0209 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76808 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53295 ,  H01L29/66477 ,  H01L29/6659

Abstract: It is to provide a manufacturing method of a semiconductor device including the following step of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 μg/m3 and less.

Abstract translation: 提供一种半导体器件的制造方法，包括以下步骤：在后表面上制备具有氮化硅膜的半导体衬底; 在所述半导体衬底的主表面上形成具有通孔的层间绝缘膜; 以及在所述通孔内选择性地形成通孔填充物。 该方法还包括以下步骤：执行晶片后表面清洁以暴露形成在半导体衬底的后表面上的氮化硅膜的表面; 然后在半导体衬底的主表面上的层间绝缘膜和通孔填充物上形成由化学放大型抗蚀剂制成的光致抗蚀剂膜，其中半导体衬底在铵离子浓度为1000μg的气氛中储存 / m3以下。

公开(公告)号：US20160276211A1

公开(公告)日：2016-09-22

申请号：US15005097

申请日：2016-01-25

Applicant: Renesas Electronics Corporation

Inventor： Kotaro HORIKOSHI ,  Toshikazu HANAWA ,  Masatoshi AKAISHI ,  Yuji KIKUCHI

IPC: H01L21/768

CPC classification number: H01L21/31116 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829

Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.

Abstract translation: 为了在抑制制造成本的同时提供高可靠性的半导体器件，通过使用至少包含CF 4气体和C 3 H 2 F 4气体的混合气体作为其组分，进行绝缘膜的干式蚀刻。

公开(公告)号：US20180047579A1

公开(公告)日：2018-02-15

申请号：US15789971

申请日：2017-10-21

Applicant: Renesas Electronics Corporation

Inventor： Kotaro HORIKOSHI ,  Toshikazu HANAWA ,  Masatoshi AKAISHI ,  Yuji KIKUCHI

IPC: H01L21/311 ,  H01L21/768

CPC classification number: H01L21/31116 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829

Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.

公开(公告)号：US20160276212A1

公开(公告)日：2016-09-22

申请号：US15005267

申请日：2016-01-25

Applicant: Renesas Electronics Corporation

Inventor： Kotaro HORIKOSHI

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L21/76802 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76808

Abstract: A semiconductor device is produced while keeping a short circuit margin between its interconnects. A method therefor includes a step in which when a multilayered resist is used to make an interconnect trench in an interlayer dielectric, a mixed gas including, as components thereof, at least CF4 gas, C3H2F4 gas and O2 gas is used to perform dry etching in order to form the multilayered resist.

Abstract translation: 制造半导体器件，同时在其互连之间保持短路裕度。 其方法包括以下步骤，其中当使用多层抗蚀剂在层间电介质中制造互连沟槽时，使用包含至少CF 4气体，C 3 H 2 F 4气体和O 2气体作为其组分的混合气体进行干蚀刻 以形成多层抗蚀剂。

公开(公告)号：US20170358489A1

公开(公告)日：2017-12-14

申请号：US15670867

申请日：2017-08-07

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kiyoshi MAESHIMA ,  Kotaro HORIKOSHI ,  Katsuhiko HOTTA ,  Toshiyuki TAKAHASHI ,  Hironori OCHI ,  Kenichi SHOJI

IPC: H01L21/768 ,  H01L29/66 ,  H01L21/321 ,  H01L23/532 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/0206 ,  H01L21/02074 ,  H01L21/0209 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76808 ,  H01L21/76826 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53295 ,  H01L29/66477 ,  H01L29/6659

Abstract: It is to provide a manufacturing method of a semiconductor device including the following steps of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 μg/m3 and less.

公开(公告)号：US20170062250A1

公开(公告)日：2017-03-02

申请号：US15220443

申请日：2016-07-27

Applicant: Renesas Electronics Corporation

Inventor： Katsuyoshi KOGURE ,  Kotaro HORIKOSHI ,  Kaichiro KOBAYASHI ,  Kazuyuki OZEKI

IPC: H01L21/67 ,  H01L21/324 ,  H01L21/66

CPC classification number: H01L21/67201 ,  H01L21/324 ,  H01L22/20

Abstract: An asking apparatus includes a load-lock chamber and an apparatus control unit. The load-lock chamber takes in or out a semiconductor wafer to or from a process chamber in which a vacuum process of the semiconductor wafer is performed. The apparatus control unit controls a venting process for putting the load-lock chamber in a vacuum state to an atmospheric state in which the load-lock chamber is opened to atmosphere. Also, the apparatus control unit compares −1 kPa that is a pressure value previously set and a differential pressure value obtained by subtracting a second pressure value that is a pressure inside the load-lock chamber right after venting to the atmosphere from a first pressure value that is a pressure inside the load-lock chamber right before venting. The apparatus control unit outputs an alarm when the differential pressure value is lower than −1 kPa that is a pressure value previously set.

Abstract translation: 询问装置包括加载锁定室和装置控制单元。 负载锁定室从半导体晶片的真空工艺进行处理室中取出或从半导体晶片外取出半导体晶片。 设备控制单元控制将负载锁定室置于真空状态的通气处理到大气状态，其中负载锁定室向大气开放。 此外，装置控制单元将作为预先设定的压力值的-1kPa与通过从第一压力值排放到大气中之后减去作为加压锁定室内的压力的第二压力值而得到的压差值 这是在排气之前的装载室内的压力。 当差压值低于预先设定的压力值的-1 kPa时，装置控制单元输出报警。

公开(公告)号：US20170004976A1

公开(公告)日：2017-01-05

申请号：US15267993

申请日：2016-09-16

Applicant: Renesas Electronics Corporation

Inventor： Kotaro HORIKOSHI ,  Toshikazu HANAWA ,  Masatoshi AKAISHI ,  Yuji KIKUCHI

IPC: H01L21/311 ,  H01L21/768

CPC classification number: H01L21/31116 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829

Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.

Abstract translation: 为了在抑制制造成本的同时提供高可靠性的半导体器件，通过使用至少包含CF 4气体和C 3 H 2 F 4气体的混合气体作为其组分，进行绝缘膜的干式蚀刻。