公开(公告)号：US20230378032A1

公开(公告)日：2023-11-23

申请号：US18175805

申请日：2023-02-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kosuke KITAICHI ,  Masatoshi SUGIURA ,  Hideaki TAMIMOTO ,  Takehiko MAEDA ,  Keita TAKADA ,  Yoshitaka KYOUGOKU

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H02M7/00

CPC classification number: H01L23/49562 ,  H01L24/32 ,  H01L24/73 ,  H01L23/49513 ,  H01L24/48 ,  H01L23/3142 ,  H01L21/565 ,  H01L23/4952 ,  H01L23/49582 ,  H02M7/003 ,  H01L24/83 ,  H01L2224/48247 ,  H01L2224/32245 ,  H01L2224/73265 ,  H01L2924/30101 ,  H01L2924/13091 ,  H01L2224/83862

Abstract: To manufacture a semiconductor device, a first heat treatment for curing a first adhesive material of a conductive paste type is performed, after a semiconductor chip is mounted on a die pad of a lead frame via the first adhesive material. After that, a metal plate is disposed on a pad of the semiconductor chip such that the metal plate faces the pad of the semiconductor chip via a second adhesive material of a conductive paste type, and a second heat treatment is performed for curing each of the first adhesive material and the second adhesive material. A time of the first heat treatment is less than a time of the second heat treatment. After the first adhesive material is cured by the first heat treatment, the first adhesive material is further cured by the second heat treatment.

公开(公告)号：US20180090451A1

公开(公告)日：2018-03-29

申请号：US15655831

申请日：2017-07-20

Applicant: Renesas Electronics Corporation

Inventor： Yoshihisa MATSUBARA ,  Yasuhiro SHIMADA ,  Yoshitaka KYOUGOKU

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49877 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/13023 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2924/16235 ,  H01L2924/16251

Abstract: While strength of a wiring board in a semiconductor substrate is ensured, thermal conductivity is increased. A BGA includes a wiring board having an upper surface and a lower surface, a semiconductor chip mounted on the upper surface of the wiring board, and ball electrodes that are a plurality of external terminals provided on the lower surface of the wiring board. The wiring board includes an insulation layer arranged between wiring layers. The insulation layer includes a resin layer, another resin layer, and an electrically conducting layer arranged between the resin layer and the other resin layer. The electrically conducting layer is formed by a lamination of a graphite sheet and a metal layer.