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1.发明授权Apparatus and methods for improving parallel conduction in a quantum well device 有权用于改善量子阱器件中的并联传导的装置和方法公开(公告)号：US08080820B2
公开(公告)日：2011-12-20
申请号：US12381832
申请日：2009-03-16
IPC分类号： H01L29/06
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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2.发明申请Apparatus and methods for improving parallel conduction in a quantum well device 有权用于改善量子阱器件中的并联传导的装置和方法公开(公告)号：US20100230658A1
公开(公告)日：2010-09-16
申请号：US12381832
申请日：2009-03-16
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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3.发明申请APPARATUS AND METHODS FOR IMPROVING PARALLEL CONDUCTION IN A QUANTUM WELL DEVICE 有权用于改善量子阱器件中并联导通的装置和方法公开(公告)号：US20120326123A1
公开(公告)日：2012-12-27
申请号：US13545358
申请日：2012-07-10
IPC分类号： H01L29/02
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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4.发明授权Apparatus and methods for improving parallel conduction in a quantum well device 有权用于改善量子阱器件中的并联传导的装置和方法公开(公告)号：US08242001B2
公开(公告)日：2012-08-14
申请号：US13274468
申请日：2011-10-17
IPC分类号： H01L21/20
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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5.发明申请APPARATUS AND METHODS FOR IMPROVING PARALLEL CONDUCTION IN A QUANTUM WELL DEVICE 审中-公开用于改善量子阱器件中并联导通的装置和方法公开(公告)号：US20130313520A1
公开(公告)日：2013-11-28
申请号：US13956685
申请日：2013-08-01
IPC分类号： H01L29/66
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
摘要翻译： 本文通常描述了提供用于改进的并联传导的量子阱装置的装置和方法的实施例。 可以描述和要求保护其他实施例。
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公开(公告)号：US08525151B2
公开(公告)日：2013-09-03
申请号：US13545358
申请日：2012-07-10
IPC分类号： H01L29/06
CPC分类号： H01L29/66977 , H01L29/1083 , H01L29/161 , H01L29/365 , H01L29/66431 , H01L29/66439 , H01L29/7781
摘要： Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
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公开(公告)号：US20140054548A1
公开(公告)日：2014-02-27
申请号：US14069880
申请日：2013-11-01
申请人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been-Yih Jin , Robert S. Chau
发明人： Ravi Pillarisetty , Jack T. Kavalieros , Willy Rachmady , Uday Shah , Benjamin Chu-Kung , Marko Radosavljevic , Niloy Mukherjee , Gilbert Dewey , Been-Yih Jin , Robert S. Chau
IPC分类号： H01L29/775 , H01L21/76 , H01L29/66
CPC分类号： H01L29/775 , B82Y10/00 , H01L21/76 , H01L29/0653 , H01L29/1054 , H01L29/155 , H01L29/165 , H01L29/267 , H01L29/517 , H01L29/66431 , H01L29/66439 , H01L29/66477 , H01L29/66795 , H01L29/66977 , H01L29/7782 , H01L29/7849 , H01L29/785 , H01L29/7851
摘要： Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a germanium fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), a doping layer (e.g., delta/modulation doped), and an undoped germanium quantum well layer. An undoped germanium fin structure is formed in the quantum well structure, and a top barrier layer deposited over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure.
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公开(公告)号：US20120309173A1
公开(公告)日：2012-12-06
申请号：US13563456
申请日：2012-07-31
申请人： Uday Shah , Benjamin Chu-Kung , Been-Yih Jin , Ravi Pillarisetty , Marko Radosavljevic , Willy Rachmady
发明人： Uday Shah , Benjamin Chu-Kung , Been-Yih Jin , Ravi Pillarisetty , Marko Radosavljevic , Willy Rachmady
CPC分类号： H01L29/0665 , B82Y10/00 , B82Y40/00 , H01L21/02236 , H01L21/02532 , H01L21/02603 , H01L21/76224 , H01L29/0649 , H01L29/0653 , H01L29/0669 , H01L29/0673 , H01L29/66439 , H01L29/775 , H01L29/78 , H01L29/78696 , H01L2221/1094
摘要： The present disclosure relates to the field of fabricating microelectronic devices. In at least one embodiment, the present disclosure relates to forming an isolated nanowire, wherein isolation structure adjacent the nanowire provides a substantially level surface for the formation of microelectronic structures thereon.
摘要翻译： 本公开涉及制造微电子器件的领域。 在至少一个实施方案中，本公开涉及形成分离的纳米线，其中与纳米线相邻的隔离结构提供用于在其上形成微电子结构的基本水平的表面。
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公开(公告)号：US08168508B2
公开(公告)日：2012-05-01
申请号：US12346554
申请日：2008-12-30
申请人： Benjamin Chu-Kung , Uday Shah , Ravi Pillarisetty , Been-Yih Jin , Marko Radosavljevic , Willy Rachmady
发明人： Benjamin Chu-Kung , Uday Shah , Ravi Pillarisetty , Been-Yih Jin , Marko Radosavljevic , Willy Rachmady
IPC分类号： H01L21/76
CPC分类号： H01L29/06 , B82Y99/00 , H01L21/76205 , H01L21/76224 , H01L29/0657 , H01L29/66795 , H01L29/775 , H01L29/7854
摘要： A method is provided. The method includes forming a plurality of nanowires on a top surface of a substrate and forming an oxide layer adjacent to a bottom surface of each of the plurality of nanowires, wherein the oxide layer is to isolate each of the plurality of nanowires from the substrate.
摘要翻译： 提供一种方法。 该方法包括在衬底的顶表面上形成多个纳米线并形成与多个纳米线中的每一个的底表面相邻的氧化物层，其中氧化物层将多个纳米线与衬底隔离。
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公开(公告)号：US20110147697A1
公开(公告)日：2011-06-23
申请号：US12653847
申请日：2009-12-18
申请人： Uday Shah , Benjamin Chu-Kung , Been-Yih Jin , Ravi Pillarisetty , Marko Radosavljevic , Willy Rachmady
发明人： Uday Shah , Benjamin Chu-Kung , Been-Yih Jin , Ravi Pillarisetty , Marko Radosavljevic , Willy Rachmady
CPC分类号： H01L29/0665 , B82Y10/00 , B82Y40/00 , H01L21/02236 , H01L21/02532 , H01L21/02603 , H01L21/76224 , H01L29/0649 , H01L29/0653 , H01L29/0669 , H01L29/0673 , H01L29/66439 , H01L29/775 , H01L29/78 , H01L29/78696 , H01L2221/1094
摘要： The present disclosure relates to the field of fabricating microelectronic devices. In at least one embodiment, the present disclosure relates to forming an isolated nanowire, wherein isolation structure adjacent the nanowire provides a substantially level surface for the formation of microelectronic structures thereon.
摘要翻译： 本公开涉及制造微电子器件的领域。 在至少一个实施方案中，本公开涉及形成分离的纳米线，其中与纳米线相邻的隔离结构提供用于在其上形成微电子结构的基本水平的表面。
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