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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140197490A1

    公开(公告)日：2014-07-17

    申请号：US14214990

    申请日：2014-03-16

    Applicant: Renesas Electronics Corporation

    Inventor： Kyoya NITTA

    IPC: H01L29/78 ,  H01L29/08

    CPC classification number: H01L29/7833 ,  H01L21/28518 ,  H01L21/32051 ,  H01L21/76838 ,  H01L23/4824 ,  H01L23/485 ,  H01L23/5222 ,  H01L23/5283 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device with improved characteristics is provided. The semiconductor device includes a LDMOS, a source plug electrically coupled to a source region of the LDMOS, a source wiring disposed over the source plug, a drain plug electrically coupled to a drain region of the LDMOS, and a drain wiring disposed over the drain plug. The structure of the source plug of the semiconductor device is devised. The semiconductor device is structured such that the drain plug is linearly disposed to extend in a direction Y, and the source plug includes a plurality of separated source plugs arranged at predetermined intervals in the direction Y. In this way, the separation of the source plug decreases an opposed area between the source plug and the drain plug, and can thus decrease the parasitic capacitance therebetween.

    Abstract translation: 提供了具有改进特性的半导体器件。 半导体器件包括LDMOS，电耦合到LDMOS的源极区域的源极端子，设置在源极端子上的源极布线，电耦合到LDMOS的漏极区域的漏极引线以及设置在漏极上的漏极布线 插头。 设计了半导体器件的源极插头的结构。 半导体器件被构造为使得排水塞线性地设置成沿Y方向延伸，并且源极插塞包括沿Y方向以​​预定间隔布置的多个分离的源极插塞。以这种方式，源插头 减小了源极插塞和排水塞之间的相对面积，从而可以减小它们之间的寄生电容。

    Semiconductor Device
    4.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20150137215A1

    公开(公告)日：2015-05-21

    申请号：US14609659

    申请日：2015-01-30

    Applicant: Renesas Electronics Corporation

    Inventor： Tsutomu OKAZAKI ,  Daisuke OKADA ,  Kyoya NITTA ,  Toshihiro TANAKA ,  Akira KATO ,  Toshikazu MATSUI ,  Yasushi ISHII ,  Digh HISAMOTO ,  Kan YASUI

    IPC: H01L27/115

    CPC classification number: H01L27/1157 ,  G11C16/0425 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/0649 ,  H01L29/4234 ,  H01L29/42344 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

    Abstract: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

    Abstract translation: 半导体存储器阵列包括具有第一电荷存储层和第一非易失性存储单元的第一非易失性存储单元，第一非易失性存储单元与第一存储单元相邻，具有第二电荷存储层和第二栅电极 。 第一电极和第二电极在垂直于第一方向的第二方向上延伸，第一电极具有在第一方向上朝向第二电极延伸的第一接触部分，并且第二电极具有朝向第一电极的第二接触部分 第一个方向 第一和第二接触位置分别沿第二方向移动，第一电极和第一接触部分与第二电极和第二接触部分电气分离。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160163857A1

    公开(公告)日：2016-06-09

    申请号：US15045034

    申请日：2016-02-16

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Kyoya NITTA

    IPC: H01L29/78 ,  H01L23/485 ,  H01L29/08

    CPC classification number: H01L29/7833 ,  H01L21/28518 ,  H01L21/32051 ,  H01L21/76838 ,  H01L23/4824 ,  H01L23/485 ,  H01L23/5222 ,  H01L23/5283 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41775 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device with improved characteristics is provided. The semiconductor device includes a LDMOS, a source plug electrically coupled to a source region of the LDMOS, a source wiring disposed over the source plug, a drain plug electrically coupled to a drain region of the LDMOS, and a drain wiring disposed over the drain plug. The structure of the source plug of the semiconductor device is devised. The semiconductor device is structured such that the drain plug is linearly disposed to extend in a direction Y, and the source plug includes a plurality of separated source plugs arranged at predetermined intervals in the direction Y. In this way, the separation of the source plug decreases an opposed area between the source plug and the drain plug, and can thus decrease the parasitic capacitance therebetween.

    Abstract translation: 提供了具有改进特性的半导体器件。 半导体器件包括LDMOS，电耦合到LDMOS的源极区域的源极端子，设置在源极端子上的源极布线，电耦合到LDMOS的漏极区域的漏极引线以及设置在漏极上的漏极布线 插头。 设计了半导体器件的源极插头的结构。 半导体器件被构造为使得排水塞线性地设置成沿Y方向延伸，并且源极插塞包括沿Y方向以​​预定间隔布置的多个分离的源极插塞。以这种方式，源插头 减小了源极插塞和排水塞之间的相对面积，从而可以减小它们之间的寄生电容。

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