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    Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials
    2.
    发明申请
    Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials 失效
    具有包含多种金属氧化物的材料的介电区域的电容器

    公开(公告)号：US20100315760A1

    公开(公告)日：2010-12-16

    申请号：US12483474

    申请日：2009-06-12

    申请人： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hully ,  Chris Carlson

    发明人： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hully ,  Chris Carlson

    IPC分类号： H01G4/10

    CPC分类号： H01L28/56 ,  H01G4/10 ,  H01L27/108

    摘要： Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10−7 amps/cm2 at from −1.1V to +1.1V.

    摘要翻译： 公开了形成电容器的电容器和方法，其包括内部导电金属电容器电极和外部导电金属电容器电极。 电容器电介质区域被容纳在内导电金属电容电极和外导电金属电容器电极之间，并且具有不大于150埃的厚度。 公开了厚度和关系的材料的各种组合，其相互之间可以实现和导致电介质区域的介电常数k至少为35，而在-1.1V至-1.0V的范围内漏电流不大于1×10-7Aps / cm 2 + 1.1V。

    Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials
    4.
    发明申请
    Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials 有权
    具有包含多种金属氧化物的材料的介电区域的电容器

    公开(公告)号：US20120320494A1

    公开(公告)日：2012-12-20

    申请号：US13597708

    申请日：2012-08-29

    申请人： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hull ,  Chris Carlson

    发明人： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hull ,  Chris Carlson

    IPC分类号： H01G4/10

    CPC分类号： H01L28/56 ,  H01G4/10 ,  H01L27/108

    摘要： Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10−7 amps/cm2 at from −1.1V to +1.1V.

    摘要翻译： 公开了形成电容器的电容器和方法，其包括内部导电金属电容器电极和外部导电金属电容器电极。 电容器电介质区域被容纳在内导电金属电容电极和外导电金属电容器电极之间，并且具有不大于150埃的厚度。 公开了厚度和关系的材料的各种组合，其相互之间可以实现和导致电介质区域的介电常数k至少为35，而在-1.1V至-1.0V的范围内漏电流不大于1×10-7Aps / cm 2 + 1.1V。

    Electrical components for microelectronic devices and methods of forming the same
    9.
    发明授权
    Electrical components for microelectronic devices and methods of forming the same 失效

    公开(公告)号：US08450173B2

    公开(公告)日：2013-05-28

    申请号：US13171320

    申请日：2011-06-28

    申请人： Rishikesh Krishnan ,  Daniel Gealy ,  Vidya Srividya ,  Noel Rocklein

    发明人： Rishikesh Krishnan ,  Daniel Gealy ,  Vidya Srividya ,  Noel Rocklein

    IPC分类号： H01L21/8242

    CPC分类号： H01G4/255 ,  H01L27/10852 ,  H01L28/65

    摘要： Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

    Electrical components for microelectronic devices
    10.
    发明授权
    Electrical components for microelectronic devices 有权
    微电子器件的电气部件

    公开(公告)号：US07968969B2

    公开(公告)日：2011-06-28

    申请号：US12502630

    申请日：2009-07-14

    申请人： Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

    发明人： Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

    IPC分类号： H01L21/02

    CPC分类号： H01G4/255 ,  H01L27/10852 ,  H01L28/65

    摘要： Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

    摘要翻译： 用于微电子器件的电气部件和用于形成电气部件的方法。 这种方法的一个具体实施方案包括将下面的层沉积到工件上，并在下层上形成导电层。 该方法可以通过在导电层上设置介电层来继续。 底层是导致电介质层具有比没有底层存在于导电层下方更高的介电常数的材料。 例如，下层可以赋予薄膜叠层的结构或另一性质，导致另外的无定形介电层结晶，而不必在将介电层设置在导电层上之后进行单独的高温退火工艺。 预期该方法的几个实例对于形成具有高介电常数的介电层非常有用，因为它们避免使用单独的高温退火工艺。