公开(公告)号：US09607764B2

公开(公告)日：2017-03-28

申请号：US14845463

申请日：2015-09-04

Applicant: Chun-Yen Chang

Inventor： Chun-Yen Chang

IPC: B05D5/12 ,  H01G4/00 ,  H01G4/06 ,  H01G4/30 ,  H01G4/002 ,  H01G4/255

CPC classification number: H01G4/06 ,  H01G4/002 ,  H01G4/008 ,  H01G4/255 ,  H01G4/30

Abstract: A method for fabricating a magnetic capacitor is provided. A first conducting material is deposited to form a first electrode layer. One or more first ferro-magnetic elements are deposited to form magnetic layer and are aligned and magnetized to produce a magnetic field. An insulating material is deposited to form an insulating layer. A second conducting material is deposited to form a second electrode layer. The one or more ferro-magnetic elements are aligned and magnetized to apply the magnetic field to the insulator layer so that the magnetic field is perpendicular to the first electrode layer and the second electrode layer, and so that the magnetic field is periodic along the length of the insulator layer and results in electric dipoles being formed in the insulator layer when a voltage is applied between the first electrode layer and the second electrode layer.

公开(公告)号：US20150158114A1

公开(公告)日：2015-06-11

申请号：US14102132

申请日：2013-12-10

Applicant: Analog Devices Technology

Inventor： Bernard Patrick Stenson ,  Paul Martin Lambkin ,  Colette J. Blaney ,  John Beatty

IPC: B23K26/00 ,  H01L27/01

CPC classification number: H01G4/33 ,  H01C7/006 ,  H01C17/242 ,  H01G4/255

Abstract: A phase corrector for laser trimming a component, the phase corrector comprising: a first correction structure located to a first side of the component, the first correction structure comprising first and second correction regions at first and second distances from the component; and a second correction structure located to a second side the component, the second correction structure comprising third and fourth correction regions at third and fourth distances from the component.

Abstract translation: 一种用于激光微调分量的相位校正器，所述相位校正器包括：位于所述分量的第一侧的第一校正结构，所述第一校正结构包括距离所述分量的第一和第二距离处的第一和第二校正区域; 以及位于所述部件的第二侧的第二校正结构，所述第二校正结构包括距所述部件的第三和第四距离处的第三和第四校正区域。

公开(公告)号：US08987863B2

公开(公告)日：2015-03-24

申请号：US13903364

申请日：2013-05-28

Applicant: Micron Technology, Inc.

Inventor： Rishikesh Krishnan ,  F. Daniel Gealy ,  Vidya Srividya ,  Noel Rocklein

IPC: H01L21/02 ,  H01G4/255 ,  H01L27/108 ,  H01L49/02

CPC classification number: H01G4/255 ,  H01L27/10852 ,  H01L28/65

Abstract: Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

公开(公告)号：US08971013B2

公开(公告)日：2015-03-03

申请号：US13554165

申请日：2012-07-20

Applicant: YuJen Wang

Inventor： YuJen Wang

IPC: H01G4/005 ,  H01L49/02 ,  H01G4/012 ,  H01G4/255 ,  H01G4/30 ,  H01G4/33 ,  H01L23/522 ,  H01L23/58 ,  H01L27/08 ,  H01L27/02

CPC classification number: H01G4/012 ,  H01G4/255 ,  H01G4/30 ,  H01G4/33 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/585 ,  H01L27/0207 ,  H01L27/0805 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A electronic device is provided. The electronic device includes a first electrode formed in a first layer; a second electrode formed in the first layer, wherein the first electrode and the second electrode are symmetrically disposed with respect to a first point; and a first floating metal ring formed in the first layer and enclosing the first electrode and the second electrode.

Abstract translation: 提供电子设备。 电子器件包括形成在第一层中的第一电极; 形成在第一层中的第二电极，其中第一电极和第二电极相对于第一点对称设置; 以及形成在所述第一层中并包围所述第一电极和所述第二电极的第一浮动金属环。

公开(公告)号：US08750024B2

公开(公告)日：2014-06-10

申请号：US13256245

申请日：2009-06-18

Applicant: Alexandre M. Bratkovski ,  R. Stanley Williams

Inventor： Alexandre M. Bratkovski ,  R. Stanley Williams

IPC: G11C11/24

CPC classification number: G11C11/24 ,  G11C13/0002 ,  H01G4/1272 ,  H01G4/255 ,  H01G4/33 ,  H01L27/101 ,  H01L28/40

Abstract: A memcapacitor device (100) includes a first electrode (104) and a second electrode (106) and a memcapacitive matrix (102) interposed between the first electrode (104) and the second electrode (106). Mobile dopants (111) are contained within the memcapacitive matrix (102) and are repositioned within the memcapacitive matrix (102) by the application of a programming voltage (126) across the first electrode (104) and second electrode (106) to alter the capacitance of the memcapacitor (100). A method for utilizing a memcapacitive device (100) includes applying a programming voltage (126) across a memcapacitive matrix (102) such that mobile ions (111) contained within a memcapacitive matrix (102) are redistributed and alter a capacitance of the memcapacitive device (100), then removing the programming voltage (126) and applying a reading voltage to sense the capacitance of the memcapacitive device (100).

Abstract translation: 电容器装置（100）包括插入在第一电极（104）和第二电极（106）之间的第一电极（104）和第二电极（106）和存储电容矩阵（102）。 移动掺杂剂（111）被包含在存储器电容矩阵（102）内，并且通过跨越第一电极（104）和第二电极（106）施加编程电压（126）而重新定位在存储电容矩阵（102）内，以改变 电容器（100）的电容。 一种利用存储电容器件（100）的方法包括跨越存储电容矩阵（102）施加编程电压（126），使得包含在存储电容矩阵（102）内的移动离子（111）被重新分配并改变存储器件的电容 （100），然后去除所述编程电压（126）并施加读取电压以感测所述存储器件（100）的电容。

公开(公告)号：US20140085768A1

公开(公告)日：2014-03-27

申请号：US14033189

申请日：2013-09-20

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kenji SAITO ,  Koichiro MORITA

IPC: H01G4/30

CPC classification number: H01G4/30 ,  H01G4/12 ,  H01G4/255

Abstract: A multilayer ceramic capacitor, whose CR product can be prevented from dropping with certainty even at a thickness of 1.0 μm or less, includes multiple unit capacitors wherein a part constituted by two adjacent internal electrode layers in the laminating direction and one dielectric layer present between the two internal electrode layers is defined as a unit capacitor. The capacitances of the unit capacitors arranged in the laminating direction exhibit a distribution that gradually increases from both ends in the laminating direction toward the inside, while gradually decreasing from the two apexes of increase toward the center in the laminating direction.

Abstract translation: 即使厚度为1.0μm以下，也能够确实地防止CR产物滴落的多层陶瓷电容器包括多个单位电容器，其中在层叠方向上由两个相邻的内部电极层构成的部分和存在于层叠方向之间的一个电介质层 两个内部电极层被定义为单位电容器。 沿着层叠方向配置的单位电容器的电容呈现从层叠方向的两端向内侧逐渐增加的分布，同时从层叠方向的两个顶点向中心逐渐减小。

公开(公告)号：US08614417B2

公开(公告)日：2013-12-24

申请号：US13703912

申请日：2011-07-11

Applicant: Richard Moulds ,  Kenneth R. Worthington ,  Eliot Powell

Inventor： Richard Moulds ,  Kenneth R. Worthington ,  Eliot Powell

IPC: H01J49/24

CPC classification number: G01R29/0878 ,  G01R15/16 ,  G01R19/0084 ,  H01G2/04 ,  H01G4/02 ,  H01G4/228 ,  H01G4/255 ,  H01G4/40 ,  H01J49/022 ,  H01J49/24

Abstract: A capacitor assembly (1) for measuring the level of radio frequency voltage in a mass spectrometer. The assembly (1) includes an RF sensing capacitor (2) with first and second capacitor plates (3, 4), a rectifying circuit (5) and a vacuum housing feedthrough (6), all of which are mounted within a vacuum enclosure of the mass spectrometer. The first capacitor plate (3) is adapted for connection to a voltage source and mounted within the enclosure by first insulating spacers (31). The second capacitor plate (4) is nested within the first insulating spacers (31) and mounted within the enclosure by second insulating spacers (41). The rectifying circuit (5) is electrically connected to the second capacitor plate (4) and to the vacuum housing feedthrough (6).

Abstract translation: 一种用于测量质谱仪中射频电压电平的电容器组件（1）。 组件（1）包括具有第一和第二电容器板（3,4），整流电路（5）和真空壳体馈通（6）的RF感测电容器（2），所有这些都被安装在 质谱仪。 第一电容器板（3）适于连接到电压源并通过第一绝缘间隔件（31）安装在外壳内。 第二电容器板（4）嵌套在第一绝缘间隔件（31）内，并通过第二绝缘间隔件（41）安装在外壳内。 整流电路（5）与第二电容器板（4）和真空室馈通（6）电连接。

公开(公告)号：US20110163827A1

公开(公告)日：2011-07-07

申请号：US13063624

申请日：2009-09-24

Applicant: Masayoshi Kanno ,  Toshiaki Yokota ,  Kazutaka Habu ,  Makoto Watanabe ,  Noritaka Sato

Inventor： Masayoshi Kanno ,  Toshiaki Yokota ,  Kazutaka Habu ,  Makoto Watanabe ,  Noritaka Sato

IPC: H03H7/00 ,  H01G5/16 ,  H01G7/06

CPC classification number: H03H7/0115 ,  H01G4/232 ,  H01G4/255 ,  H01G4/30 ,  H01G7/06 ,  H03H2001/0085

Abstract: To suppress changes in capacitance due to displacement between electrodes opposing each other across a dielectric layer, thereby allowing stable manufacturing of a capacitance device having a desired capacitance.The capacitance device according to the present invention is of a configuration including a dielectric layer (10), a first electrode (11) formed on a predetermined surface (10a) of the dielectric layer (10), and a second electrode (12) formed on a surface (10b) on the opposite side of the dielectric layer (10) from the predetermined surface (10a). The forms of the first and second electrodes (11, 12) are set so that even in the event that the first electrode (11) is relatively displaced regarding position in a predetermined direction as to the second electrode (12), the area of the opposing-electrode region between the first electrode (11) and to the second electrode (12) is unchanged.

Abstract translation: 为了抑制由电介质层彼此相对的电极之间的位移引起的电容变化，从而允许具有期望电容的电容器件的稳定制造。 根据本发明的静电电容器件具有包括电介质层（10），形成在电介质层（10）的预定表面（10a）上的第一电极（11））和形成的第二电极（12） 在与所述预定表面（10a）相对的所述电介质层（10）的相对侧上的表面（10b）上。 第一和第二电极（11,12）的形状被设定为使得即使在第一电极（11）相对于第二电极（12）在预定方向上的位置相对位移的情况下， 第一电极（11）与第二电极（12）之间的对置电极区域不变。

公开(公告)号：US07968969B2

公开(公告)日：2011-06-28

申请号：US12502630

申请日：2009-07-14

Applicant: Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

Inventor： Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

IPC: H01L21/02

CPC classification number: H01G4/255 ,  H01L27/10852 ,  H01L28/65

Abstract: Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

Abstract translation: 用于微电子器件的电气部件和用于形成电气部件的方法。 这种方法的一个具体实施方案包括将下面的层沉积到工件上，并在下层上形成导电层。 该方法可以通过在导电层上设置介电层来继续。 底层是导致电介质层具有比没有底层存在于导电层下方更高的介电常数的材料。 例如，下层可以赋予薄膜叠层的结构或另一性质，导致另外的无定形介电层结晶，而不必在将介电层设置在导电层上之后进行单独的高温退火工艺。 预期该方法的几个实例对于形成具有高介电常数的介电层非常有用，因为它们避免使用单独的高温退火工艺。

公开(公告)号：US20090273058A1

公开(公告)日：2009-11-05

申请号：US12502630

申请日：2009-07-14

Applicant: Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

Inventor： Rishikesh Krishnan ,  Dan Gealy ,  Vidya Srividya ,  Noel Rocklein

IPC: H01L27/10 ,  H01G4/08 ,  H01G4/008

CPC classification number: H01G4/255 ,  H01L27/10852 ,  H01L28/65

Abstract: Electrical components for microelectronic devices and methods for forming electrical components. One particular embodiment of such a method comprises depositing an underlying layer onto a workpiece, and forming a conductive layer on the underlying layer. The method can continue by disposing a dielectric layer on the conductive layer. The underlying layer is a material that causes the dielectric layer to have a higher dielectric constant than without the underlying layer being present under the conductive layer. For example, the underlying layer can impart a structure or another property to the film stack that causes an otherwise amorphous dielectric layer to crystallize without having to undergo a separate high temperature annealing process after disposing the dielectric layer onto the conductive layer. Several examples of this method are expected to be very useful for forming dielectric layers with high dielectric constants because they avoid using a separate high temperature annealing process.

Abstract translation: 用于微电子器件的电气部件和用于形成电气部件的方法。 这种方法的一个具体实施方案包括将下面的层沉积到工件上，并在下层上形成导电层。 该方法可以通过在导电层上设置介电层来继续。 底层是导致电介质层具有比没有底层存在于导电层下方更高的介电常数的材料。 例如，下层可以赋予薄膜叠层的结构或另一性质，导致另外的无定形介电层结晶，而不必在将介电层设置在导电层上之后进行单独的高温退火工艺。 预期该方法的几个实例对于形成具有高介电常数的介电层非常有用，因为它们避免使用单独的高温退火工艺。