-
公开(公告)号：US06233702B1
公开(公告)日：2001-05-15
申请号：US08485055
申请日：1995-06-07
申请人： Robert W. Horst , David J. Garcia , William Patterson Bunton , William F. Bruckert , Daniel L. Fowler , Curtis Willard Jones, Jr. , David Paul Sonnier , William Joel Watson , Frank A. Williams
发明人： Robert W. Horst , David J. Garcia , William Patterson Bunton , William F. Bruckert , Daniel L. Fowler , Curtis Willard Jones, Jr. , David Paul Sonnier , William Joel Watson , Frank A. Williams
IPC分类号： G06F1100
CPC分类号： G01R31/31727 , G01R31/318533 , G06F1/12 , G06F11/004 , G06F11/10 , G06F11/1044 , G06F11/1604 , G06F11/1633 , G06F11/1645 , G06F11/165 , G06F11/1658 , G06F11/167 , G06F11/1679 , G06F11/1683 , G06F11/1687 , G06F11/1695 , G06F11/20 , G06F11/2043 , G06F11/2097 , G06F11/2736 , G06F12/0815 , G06F12/1483 , G06F2201/845 , H04L12/56 , H04L47/10 , H04L49/90 , H04L49/901 , H04L49/9057 , H04L69/40
摘要： A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.
摘要翻译： 多处理器系统包括大量相同构造的多个子处理器系统，每个子处理器系统包括中央处理单元（CPU），以及至少一个I / O设备，其通过也互连子处理器系统的路由设备互连。 任何一个子处理器系统的CPU可以通过路由元件与系统的任何I / O设备或系统的任何CPU通信.I / O设备和CPU之间的通信是通过分组消息。 来自I / O设备的中断从I / O设备传送到CPU（或从一个CPU到另一个CPU）作为消息包.CPU和I / O设备可以写入或读取来自CPU的CPU的存储器 系统。 存储器保护由每个CPU维护的访问验证方法提供，其中CPU和/或I / O设备被提供有对该CPU的存储器的读/写的验证，没有哪个内存访问被拒绝。
-
公开(公告)号：US5751932A
公开(公告)日：1998-05-12
申请号：US485217
申请日：1995-06-07
申请人： Robert W. Horst , William Edward Baker , Randall G. Banton , John Michael Brown , William F. Bruckert , William Patterson Bunton , Gary F. Campbell , John Deane Coddington , Richard W. Cutts, Jr. , Barry Lee Drexler , Harry Frank Elrod , Daniel L. Fowler , David J. Garcia , Paul N. Hintikka , Geoffrey I. Iswandhi , Douglas Eugene Jewett , Curtis Willard Jones, Jr. , James Stevens Klecka , John C. Krause , Stephen G. Low , Susan Stone Meredith , Steven C. Meyers , David P. Sonnier , William Joel Watson , Patricia L. Whiteside , Frank A. Williams , Linda Ellen Zalzala
发明人： Robert W. Horst , William Edward Baker , Randall G. Banton , John Michael Brown , William F. Bruckert , William Patterson Bunton , Gary F. Campbell , John Deane Coddington , Richard W. Cutts, Jr. , Barry Lee Drexler , Harry Frank Elrod , Daniel L. Fowler , David J. Garcia , Paul N. Hintikka , Geoffrey I. Iswandhi , Douglas Eugene Jewett , Curtis Willard Jones, Jr. , James Stevens Klecka , John C. Krause , Stephen G. Low , Susan Stone Meredith , Steven C. Meyers , David P. Sonnier , William Joel Watson , Patricia L. Whiteside , Frank A. Williams , Linda Ellen Zalzala
IPC分类号： G06F11/18 , G01R31/317 , G01R31/3185 , G06F1/12 , G06F9/52 , G06F11/00 , G06F11/10 , G06F11/16 , G06F11/20 , G06F11/273 , G06F12/08 , G06F12/14 , G06F12/16 , G06F13/00 , H04L12/56 , H04L29/14
CPC分类号： G01R31/31727 , G06F1/12 , G06F11/10 , G06F11/1604 , G06F11/1633 , G06F11/1645 , G06F11/165 , G06F11/1658 , G06F11/1679 , G06F11/1687 , G06F12/0815 , G06F12/1483 , H04L47/10 , H04L49/90 , H04L49/901 , H04L49/9057 , H04L69/40 , G01R31/318533 , G06F11/004 , G06F11/1044 , G06F11/167 , G06F11/1683 , G06F11/1695 , G06F11/20 , G06F11/2043 , G06F11/2097 , G06F11/2736 , G06F2201/845 , H04L12/56
摘要： A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. The CPUs are structured to operate in one of two modes: a simplex mode in which the two CPUs operate independently of each other, and a duplex mode in which the CPUs operate in lock-step synchronism to execute each instruction of identical instruction streams at substantially the same time. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.
摘要翻译： 多处理器系统包括大量相同构造的多个子处理器系统，每个子处理器系统包括中央处理单元（CPU），以及至少一个I / O设备，其通过也互连子处理器系统的路由设备互连。 任何一个子处理器系统的CPU可以通过路由元件与系统的任何I / O设备或系统的任何CPU通信。 CPU被构造为以两种模式之一操作：两个CPU彼此独立地操作的单工模式，以及CPU以锁步同步操作的双工模式，以基本上执行相同指令流的每条指令 同一时间。 I / O设备和CPU之间的通信是分组消息。 来自I / O设备的中断从I / O设备传送到CPU（或从一个CPU到另一个CPU）作为消息数据包。 CPU和I / O设备可以写入或读取系统的CPU的存储器。 存储器保护由每个CPU维护的访问验证方法提供，其中CPU和/或I / O设备被提供有对该CPU的存储器的读/写的验证，没有哪个内存访问被拒绝。
-
3.发明授权Interrupt message delivery identified by storage location of received interrupt data 失效中断消息传递由接收到的中断数据的存储位置标识
公开(公告)号：US5675807A
公开(公告)日：1997-10-07
申请号：US481749
申请日：1995-06-07
申请人： Geoffrey I. Iswandhi , William Edward Baker , William Patterson Bunton , John Deane Coddington , Daniel L. Fowler , David J. Garcia , Paul N. Hintikka , Susan Stone Meredith , Stephen H. Miller , David Paul Sonnier , William Joel Watson , Frank A. Williams
发明人： Geoffrey I. Iswandhi , William Edward Baker , William Patterson Bunton , John Deane Coddington , Daniel L. Fowler , David J. Garcia , Paul N. Hintikka , Susan Stone Meredith , Stephen H. Miller , David Paul Sonnier , William Joel Watson , Frank A. Williams
IPC分类号： G06F11/18 , G01R31/317 , G01R31/3185 , G06F1/12 , G06F9/52 , G06F11/00 , G06F11/10 , G06F11/16 , G06F11/20 , G06F11/273 , G06F12/08 , G06F12/14 , G06F12/16 , G06F13/00 , H04L12/56 , H04L29/14
CPC分类号： G01R31/31727 , G06F1/12 , G06F11/10 , G06F11/1604 , G06F11/1633 , G06F11/1645 , G06F11/165 , G06F11/1658 , G06F11/1679 , G06F11/1687 , G06F12/0815 , G06F12/1483 , H04L47/10 , H04L49/90 , H04L49/901 , H04L49/9057 , H04L69/40 , G01R31/318533 , G06F11/004 , G06F11/1044 , G06F11/167 , G06F11/1683 , G06F11/1695 , G06F11/20 , G06F11/2043 , G06F11/2097 , G06F11/2736 , G06F2201/845 , H04L12/56
摘要： A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets, and stored at an interrupt queue in memory. Storage of the interrupt data will initiate an internal interrupt to notify the receiving CPU. The receiving CPU can then access the interrupt queue, examine the interrupt data, and determine what action to take.
摘要翻译： 多处理器系统包括大量相同构造的多个子处理器系统，每个子处理器系统包括中央处理单元（CPU），以及至少一个I / O设备，其通过也互连子处理器系统的路由设备互连。 任何一个子处理器系统的CPU可以通过路由元件与系统的任何I / O设备或与系统的任何CPU通信。 I / O设备和CPU之间的通信是分组消息。 来自I / O设备的中断从I / O设备传送到CPU（或从一个CPU到另一个CPU）作为消息分组，并存储在存储器中的中断队列中。 中断数据的存储将启动内部中断以通知接收CPU。 然后，接收CPU可以访问中断队列，检查中断数据，并确定要采取的操作。
-
4.发明授权Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source 失效使用部分存储地址数据索引的条目对数据消息进行存储访问验证，其中包含消息源的允许的地址范围验证
公开(公告)号：US5964835A
公开(公告)日：1999-10-12
申请号：US482618
申请日：1995-06-07
申请人： Daniel L. Fowler , William Edward Baker , William Patterson Bunton , Gary F. Campbell , Richard W. Cutts, Jr. , David J. Garcia , Paul N. Hintikka , Robert W. Horst , Geoffrey I. Iswandhi , David P. Sonnier , William Joel Watson , Frank A. Williams
发明人： Daniel L. Fowler , William Edward Baker , William Patterson Bunton , Gary F. Campbell , Richard W. Cutts, Jr. , David J. Garcia , Paul N. Hintikka , Robert W. Horst , Geoffrey I. Iswandhi , David P. Sonnier , William Joel Watson , Frank A. Williams
IPC分类号： G06F11/18 , G01R31/317 , G01R31/3185 , G06F1/12 , G06F9/52 , G06F11/00 , G06F11/10 , G06F11/16 , G06F11/20 , G06F11/273 , G06F12/08 , G06F12/14 , G06F12/16 , G06F13/00 , H04L12/56 , H04L29/14
CPC分类号： G01R31/31727 , G06F1/12 , G06F11/10 , G06F11/1604 , G06F11/1633 , G06F11/1645 , G06F11/165 , G06F11/1658 , G06F11/1679 , G06F11/1687 , G06F12/0815 , G06F12/1483 , H04L47/10 , H04L49/90 , H04L49/901 , H04L49/9057 , H04L69/40 , G01R31/318533 , G06F11/004 , G06F11/1044 , G06F11/167 , G06F11/1683 , G06F11/1695 , G06F11/20 , G06F11/2043 , G06F11/2097 , G06F11/2736 , G06F2201/845 , H04L12/56
摘要： A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identifying the source and destination of the message, and may also contain requests to write to, or read from, storage of a CPU. Protection against errant reads or writes is provided by an access validation method that utilizes access validation information contained in plural entries maintained by each CPU. Each entry provides validation by identifying what elements of the system has read and/or write wccss to the memory of that CPU, without which memory access is denied.
摘要翻译： 多处理器系统包括多个中央处理单元（CPU）和至少一个输入/输出（I / O）设备，其通过路由设备互连，用于在其间传送分组消息。 消息包含标识消息的源和目的地的地址信息，并且还可以包含写入或读取CPU的存储的请求。 通过使用由每个CPU维护的多个条目中包含的访问验证信息的访问验证方法来提供对错误读取或写入的保护。 每个条目通过确定系统的哪些元素已读取和/或将wccss写入该CPU的内存来进行验证，而不会拒绝该内存访问。
-
公开(公告)号：US5682528A
公开(公告)日：1997-10-28
申请号：US578889
申请日：1995-12-22
CPC分类号： G06F15/177 , G06F9/4405
摘要： The present invention provides a mechanism for initial execution of software code by a processor in a multiprocessor system. In the preferred embodiment, the multiprocessor system has registers implemented at a reset vector location in a processor. The registers are first loaded with a sequence of software code, and then a first instruction loop is implemented with that software code. The processor is then released from a reset state, and the first instruction loop is executed. This first instruction loop is capable of being executed for an indefinite length of time, and it can execute software instructions on a periodic basis. The first instruction loop is then modified into a second instruction loop. The first and second instruction loops have at least one different instruction. The processor within the system of multiple processors is thus initialized.
摘要翻译： 本发明提供了一种用于在多处理器系统中由处理器初始执行软件代码的机制。 在优选实施例中，多处理器系统具有在处理器中的复位向量位置处实现的寄存器。 寄存器首先加载一系列软件代码，然后使用该软件代码实现第一个指令循环。 然后处理器从复位状态释放，并且执行第一指令循环。 该第一指令循环能够执行不确定的时间长度，并且可以周期性地执行软件指令。 然后将第一个指令循环修改为第二个指令循环。 第一和第二指令循环至少有一个不同的指令。 因此，在多个处理器的系统内的处理器被初始化。
-
公开(公告)号：US06180016B2
公开(公告)日：2001-01-30
申请号：US09498155
申请日：2000-02-04
IPC分类号： B01D3700
CPC分类号： C02F1/288 , C02F1/281 , C02F1/283 , Y10S422/905 , Y10T428/249956 , Y10T428/249981 , Y10T428/249993
摘要： A method and device for the filtration and/or purification of fluids water or other solutions containing microbiological contaminants, such as fluids containing including bacteria and/or viruses, where the fluid water is passed through a purification material composed of apatite and absorption media in a fixed binder matrix.
摘要翻译： 用于过滤和/或净化流体水或其它含有微生物污染物的溶液的方法和装置，所述微生物污染物例如包含细菌和/或病毒的流体，其中流体水通过由磷灰石和吸收介质组成的净化材料 固定粘结剂基质。
-
公开(公告)号：US06957743B2
公开(公告)日：2005-10-25
申请号：US09768115
申请日：2001-01-23
IPC分类号： C12M1/12 , A61L9/16 , B01D19/00 , B01D39/14 , B01D39/20 , B01D41/04 , B01J20/04 , C02F1/20 , C02F1/28 , C02F3/10 , C12N1/00 , B01D27/02
CPC分类号： C02F1/288 , C02F1/281 , C02F1/283 , Y10S422/905 , Y10T428/249956 , Y10T428/249981 , Y10T428/249993
摘要： A method and device for the filtration and/or purification of fluids water or other solutions containing microbiological contaminants, such as fluids containing including bacteria and/or viruses, where the fluid water is passed through a purification material composed of apatite and absorption media in a fixed binder matrix.
摘要翻译： 用于过滤和/或净化流体水或其它含有微生物污染物的溶液的方法和装置，所述微生物污染物例如包含细菌和/或病毒的流体，其中流体水通过由磷灰石和吸收介质组成的净化材料 固定粘结剂基质。
-
公开(公告)号：US06187192B1
公开(公告)日：2001-02-13
申请号：US09382278
申请日：1999-08-25
IPC分类号： B01D3900
CPC分类号： C02F1/288 , C02F1/281 , C02F1/283 , Y10S422/905 , Y10T428/249956 , Y10T428/249981 , Y10T428/249993
摘要： A method and device for the filtration and/or purification of fluids water or other solutions containing microbiological contaminants, such as fluids containing including bacteria and/or viruses, where the fluid water is passed through a purification material composed of apatite and absorption media in a fixed binder matrix.
摘要翻译： 用于过滤和/或净化流体水或其它含有微生物污染物的溶液的方法和装置，所述微生物污染物例如包含细菌和/或病毒的流体，其中流体水通过由磷灰石和吸收介质组成的净化材料 固定粘结剂基质。
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.051 秒)
