公开(公告)号：US4845533A

公开(公告)日：1989-07-04

申请号：US936552

申请日：1986-11-26

申请人： Roger W. Pryor ,  Napoleon P. Formigoni ,  Stanford R. Ovshinsky

发明人： Roger W. Pryor ,  Napoleon P. Formigoni ,  Stanford R. Ovshinsky

IPC分类号： H01L21/28 ,  H01L27/10 ,  H01L27/105 ,  H01L29/43 ,  H01L45/00

CPC分类号： H01L45/04 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1675

摘要： Thin film electrical structures, such as threshold switching devices and phase change memory cells, preferably utilizing electrically stable, relatively inert, conductive electrodes including a non-single-crystal deposited film of carbon material, are disclosed. The film of carbon material, which preferably is amorphous and substantially pure, is disposed adjacent to a layer of active material such as an amorphous semiconductor, and serves to prevent undesired degradation of the active material, especially when the device is carrying appreciable current in its on-state. A method of making such structures with high quality interfaces between the semiconductor layer and the conductive carbon barrier layers adjacent thereto by successively depositing such layers in a continuously maintained partial vacuum is disclosed. The method may include a step performed in the vacuum for hermetically sealing all of, or at least the electrically switchable portion of, the active layer against subsequent contamination. Thin film structures suitable for threshold switching or memory applications and employing insulating pores having substantially sloped side walls are also disclosed.

摘要翻译： 公开了薄膜电结构，例如阈值开关器件和相变存储器单元，优选地使用电稳定的相对惰性的导电电极，其包括非材料碳沉积膜。 优选非晶态且基本上纯的碳材料薄膜邻近活性材料层（例如非晶半导体）设置，并且用于防止活性材料的不期望的降解，特别是当该装置在其中携带明显的电流时 状态。 公开了一种通过在连续保持的部分真空中依次沉积这些层，在半导体层和与其相邻的导电碳阻挡层之间制造具有高质量界面的这种结构的方法。 该方法可以包括在真空中执行的步骤，用于气密密封活性层的所有或至少电可切换部分，以防止随后的污染。 还公开了适用于阈值切换或存储器应用并采用具有基本上倾斜的侧壁的绝缘孔的薄膜结构。

公开(公告)号：US4809044A

公开(公告)日：1989-02-28

申请号：US936553

申请日：1986-11-26

申请人： Roger W. Pryor ,  Napoleon P. Formigoni ,  Stanford R. Ovshinsky

发明人： Roger W. Pryor ,  Napoleon P. Formigoni ,  Stanford R. Ovshinsky

IPC分类号： H01L29/861 ,  H01L29/866 ,  H01L45/00 ,  H02H9/04 ,  H01L29/44 ,  H01L29/46 ,  H01L29/86

CPC分类号： H01L45/1233 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1675 ,  H02H9/044

摘要： Solid-state overvoltage protection devices, preferably formed of deposited thin film, chalcogenide, threshold switching materials, typically include at least one elongated current conduction path through an elongated cross-sectional area of the threshold switching material. The cross-sectional area is formed with a length far exceeding the effective width thereof for distributing the transient current produced by overvoltage conditions over a relatively large area. In this manner, the concentration of localized heating effects can be avoided.

摘要翻译： 优选由沉积的薄膜，硫族化物，阈值开关材料形成的固态过电压保护器件通常包括通过阈值开关材料的细长横截面积的至少一个细长电流传导路径。 横截面积形成有远远超过其有效宽度的长度，用于在相对大的面积上分配由过电压条件产生的瞬态电流。 以这种方式，可以避免局部加热效应的集中。

公开(公告)号：US4795657A

公开(公告)日：1989-01-03

申请号：US721108

申请日：1985-04-08

申请人： Napoleon P. Formigoni ,  Zvi Yaniv

发明人： Napoleon P. Formigoni ,  Zvi Yaniv

IPC分类号： G11C16/02 ,  H01L27/24 ,  B05D5/12 ,  G11C11/00 ,  G11C17/00

CPC分类号： H01L27/24 ,  G11C13/0004 ,  G11C2213/72

摘要： There is disclosed a thin film photoprogrammable memory array with a substantially increased resistance associated with each cell of the array. First and second sets of orthogonally oriented address lines are formed on a substrate with the first set of address lines crossing the second set of address lines at insulated cross-overs. A plurality of amorphous silicon diodes are deposited on the members of the first set of address lines adjacent the insulated cross over points. Settable memory material, an optically programmable chalcogenide, is deposited in electrical contact with each of the amorphous silicon diodes and in electrical contact with a member of the second set of address lines adjacent the cross-over region. When the settable memory material has been set to its high conductivity state, the electrical resistance between the amorphous silicon diode and the adjacent member of the second set of address lines is proportional to an effective electrical length measured along the settable storage member. A method of making the improved array is also disclosed. In a preferred embodiment the array is made on a flexible substrate made of a synthetic polymeric resin.

摘要翻译： 公开了一种具有与阵列的每个单元相关联的显着增加的电阻的薄膜可编程存储器阵列。 第一组和第二组正交取向的地址线形成在基板上，其中第一组地址线在隔离交叉处与第二组地址线交叉。 多个非晶硅二极管沉积在与绝缘交叉点相邻的第一组地址线的构件上。 可沉积的记忆材料，光学可编程的硫族化物，被沉积成与每个非晶硅二极管电接触并与第二组地址线的与交叉区域相邻的构件电接触。 当可设定的记忆材料被设定为高导电性状态时，非晶硅二极管与第二组地址线的相邻构件之间的电阻与沿着可设定的存储构件测得的有效电长度成比例。 还公开了制造改进的阵列的方法。 在一个优选实施例中，该阵列制成在由合成聚合物树脂制成的柔性基底上。