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69 条记录 (耗时 0.026 秒)

    Interconnection structure and method of manufacturing the same
    1.
    发明授权
    Interconnection structure and method of manufacturing the same 有权
    互连结构及制造方法

    公开(公告)号：US07462038B2

    公开(公告)日：2008-12-09

    申请号：US11676622

    申请日：2007-02-20

    申请人： Roman Knoefler ,  Christoph Kleint ,  Steffen Meyer ,  Nicolas Nagel

    发明人： Roman Knoefler ,  Christoph Kleint ,  Steffen Meyer ,  Nicolas Nagel

    IPC分类号： H01R12/00

    CPC分类号： H01R13/22

    摘要： An interconnection structure includes two staggered contact rows of evenly spaced contacts. Each contact row extends along a first direction. The interconnection structure further includes conductive lines extending along a second direction that intersects the first direction. The interconnection structure further includes intermediate contacts, where each intermediate contact is in contact with one of the contacts and one of the conductive lines.

    摘要翻译： 互连结构包括具有均匀间隔的接触的两个交错的接触排。 每个接触排沿第一方向延伸。 互连结构还包括沿着与第一方向相交的第二方向延伸的导电线。 互连结构还包括中间触点，其中每个中间触点与触点之一和导线中的一个接触。

    INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME 有权
    互连结构及其制造方法

    公开(公告)号：US20080200046A1

    公开(公告)日：2008-08-21

    申请号：US11676622

    申请日：2007-02-20

    申请人： Roman Knoefler ,  Christoph Kleint ,  Steffen Meyer ,  Nicolas Nagel

    发明人： Roman Knoefler ,  Christoph Kleint ,  Steffen Meyer ,  Nicolas Nagel

    IPC分类号： H01R12/00

    CPC分类号： H01R13/22

    摘要： An interconnection structure includes two staggered contact rows of evenly spaced contacts. Each contact row extends along a first direction. The interconnection structure further includes conductive lines extending along a second direction that intersects the first direction. The interconnection structure further includes intermediate contacts, where each intermediate contact is in contact with one of the contacts and one of the conductive lines.

    摘要翻译： 互连结构包括具有均匀间隔的接触的两个交错的接触排。 每个接触排沿第一方向延伸。 互连结构还包括沿着与第一方向相交的第二方向延伸的导电线。 互连结构还包括中间触点，其中每个中间触点与触点之一和导线中的一个接触。

    Semiconductor product and method for forming a semiconductor product
    5.
    发明申请
    Semiconductor product and method for forming a semiconductor product 有权
    用于形成半导体产品的半导体产品和方法

    公开(公告)号：US20070048993A1

    公开(公告)日：2007-03-01

    申请号：US11217122

    申请日：2005-08-31

    申请人： Josef Willer ,  Patrick Haibach ,  Christoph Kleint ,  Nicolas Nagel

    发明人： Josef Willer ,  Patrick Haibach ,  Christoph Kleint ,  Nicolas Nagel

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76897 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11568

    摘要： A semiconductor product includes a substrate having a substrate surface. A plurality of wordlines are arranged at a distance from one another and running along a first direction. A plurality of conductive contact structures are provided between the wordlines. The product also includes a plurality of filling structures. Each filling structure separates from one another two respective contact structures arranged between two respective wordlines. The two respective contact structures are arranged at a distance from one another in the first direction. In the preferred embodiment, the contact structures have a top side provided at a distance from the substrate surface and extends to the substrate surface. The contact structures at the substrate surface have a width along the first direction that is larger than a width of the top sides of the contact structures along the first direction.

    摘要翻译： 半导体产品包括具有基板表面的基板。 多个字线被布置成彼此间隔一定距离并沿着第一方向延伸。 在字线之间提供多个导电接触结构。 该产品还包括多个填充结构。 每个填充结构彼此分开布置在两个相应字线之间的两个相应的接触结构。 两个相应的接触结构在第一方向上彼此间隔一定距离。 在优选实施例中，接触结构具有设置在离基板表面一定距离处并且延伸到基板表面的顶侧。 衬底表面处的接触结构具有沿着第一方向的宽度，该宽度大于沿着第一方向的接触结构的顶侧宽度。

    Method of forming contacts using auxiliary structures
    6.
    发明授权
    Method of forming contacts using auxiliary structures 有权
    使用辅助结构形成触点的方法

    公开(公告)号：US07416976B2

    公开(公告)日：2008-08-26

    申请号：US11217122

    申请日：2005-08-31

    申请人： Josef Willer ,  Patrick Haibach ,  Christoph Andreas Kleint ,  Nicolas Nagel

    发明人： Josef Willer ,  Patrick Haibach ,  Christoph Andreas Kleint ,  Nicolas Nagel

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76897 ,  H01L21/76895 ,  H01L27/115 ,  H01L27/11568

    摘要： A semiconductor product includes a substrate having a substrate surface. A plurality of wordlines are arranged at a distance from one another and running along a first direction. A plurality of conductive contact structures are provided between the wordlines. The product also includes a plurality of filling structures. Each filling structure separates from one another two respective contact structures arranged between two respective wordlines. The two respective contact structures are arranged at a distance from one another in the first direction. In the preferred embodiment, the contact structures have a top side provided at a distance from the substrate surface and extends to the substrate surface. The contact structures at the substrate surface have a width along the first direction that is larger than a width of the top sides of the contact structures along the first direction.

    摘要翻译： 半导体产品包括具有基板表面的基板。 多个字线被布置成彼此间隔一定距离并沿着第一方向延伸。 在字线之间提供多个导电接触结构。 该产品还包括多个填充结构。 每个填充结构彼此分开布置在两个相应字线之间的两个相应的接触结构。 两个相应的接触结构在第一方向上彼此间隔一定距离。 在优选实施例中，接触结构具有设置在离基板表面一定距离处并且延伸到基板表面的顶侧。 衬底表面处的接触结构具有沿着第一方向的宽度，该宽度大于沿着第一方向的接触结构的顶侧宽度。

    Method of manufacturing at least one semiconductor component and memory cells
    8.
    发明申请
    Method of manufacturing at least one semiconductor component and memory cells 有权
    制造至少一个半导体部件和存储单元的方法

    公开(公告)号：US20080009115A1

    公开(公告)日：2008-01-10

    申请号：US11483968

    申请日：2006-07-10

    申请人： Josef Willer ,  Nicolas Nagel

    发明人： Josef Willer ,  Nicolas Nagel

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L29/792

    摘要： A method of manufacturing at least one NAND-coupled semiconductor component is disclosed. A layer structure is formed on or above a semiconductor substrate. The layer structure is patterned to expose at least one region to be doped. The exposed region is doped and annealed. The patterned layer structure is at least partially removed. Replacing material is formed in the region in which the patterned layer structure has been removed, thereby forming the at least one NAND-coupled semiconductor component.

    摘要翻译： 公开了制造至少一个NAND耦合的半导体部件的方法。 在半导体衬底上或上方形成层结构。 图案化层结构以暴露待掺杂的至少一个区域。 曝光区域被掺杂并退火。 图案化层结构至少部分地被去除。 在去除图案层结构的区域中形成更换材料，从而形成至少一个NAND耦合的半导体部件。

    Method for forming a semiconductor product and semiconductor product
    9.
    发明申请
    Method for forming a semiconductor product and semiconductor product 失效
    用于形成半导体产品和半导体产品的方法

    公开(公告)号：US20070001305A1

    公开(公告)日：2007-01-04

    申请号：US11172366

    申请日：2005-06-30

    申请人： Thomas Mikolajick ,  Torsten Mueller ,  Nicolas Nagel ,  Lars Bach ,  Dominik Olligs ,  Veronika Polei

    发明人： Thomas Mikolajick ,  Torsten Mueller ,  Nicolas Nagel ,  Lars Bach ,  Dominik Olligs ,  Veronika Polei

    IPC分类号： H01L23/52 ,  H01L21/4763

    CPC分类号： H01L21/76816 ,  H01L21/76838 ,  H01L27/115 ,  H01L27/11568

    摘要： A semiconductor product includes, a substrate with a first dielectric layer having contact hole fillings for contacting active areas in the substrate. A second dielectric layer with contact holes is provided therein. The contact holes have a width in a first lateral direction. The product further includes conductive lines, each conductive line passing over contact holes in the second dielectric layer and contacting a plurality of contact hole fillings in the first dielectric layer. The conductive lines have a width, in the first lateral direction, that is smaller than the width of the contact holes of the second dielectric layer. The conductive lines are in direct mechanical contact with the contact hole fillings and thereby remove the need to provide any conventional “contact to interconnect” structures.

    摘要翻译： 半导体产品包括具有第一电介质层的衬底，该第一电介质层具有用于接触衬底中的有源区的接触孔填充物。 在其中设置有具有接触孔的第二介质层。 接触孔在第一横向具有宽度。 该产品还包括导线，每个导线穿过第二介电层中的接触孔，并接触第一介电层中的多个接触孔填充物。 导电线在第一横向方向上的宽度小于第二介电层的接触孔的宽度。 导线与接触孔填充物直接机械接触，从而消除了提供任何传统的“接触互连”结构的需要。

    Method of forming a contact in a flash memory device
    10.
    发明申请
    Method of forming a contact in a flash memory device 有权
    在闪速存储器件中形成触点的方法

    公开(公告)号：US20060286796A1

    公开(公告)日：2006-12-21

    申请号：US11157143

    申请日：2005-06-20

    申请人： Nicolas Nagel ,  Dominik Olligs

    发明人： Nicolas Nagel ,  Dominik Olligs

    IPC分类号： H01L21/4763 ,  H01L21/44

    CPC分类号： H01L27/115 ,  H01L21/76802 ,  H01L21/76895 ,  H01L27/11568

    摘要： A method of forming a contact between a bitline and a local interconnect in a flash memory device comprises forming a hard mask layer on a planarized surface that includes an exposed top section of the local interconnects prior to depositing an oxide dielectric layer. The hard mask layer may be composed of a material that has an etch resistance as compared to the interlayer dielectric material, e.g., nitride. Openings in the hard mask define positions for the contacts to the local interconnects exposed in the top section.

    摘要翻译： 在闪速存储器件中形成位线和局部互连之间的接触的方法包括在沉积氧化物介电层之前在平坦化表面上形成硬掩模层，其包括局部互连的暴露的顶部部分。 硬掩模层可以由与层间电介质材料（例如氮化物）相比具有耐蚀刻性的材料构成。 硬掩模中的开口定义了与顶部暴露的局部互连的触点的位置。