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    Glass substrate having circuit pattern and process for producing the same
    1.
    发明授权
    Glass substrate having circuit pattern and process for producing the same 有权
    具有电路图案的玻璃基板及其制造方法

    公开(公告)号：US07846641B2

    公开(公告)日：2010-12-07

    申请号：US12143446

    申请日：2008-06-20

    申请人： Ryohei Satoh ,  Koji Nakagawa ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Yumiko Aoki

    发明人： Ryohei Satoh ,  Koji Nakagawa ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Yumiko Aoki

    IPC分类号： G03F7/26

    CPC分类号： H05K3/28 ,  H01J9/02 ,  H01J11/12 ,  H01J11/34 ,  H05K1/0306 ,  H05K3/027 ,  H05K3/38 ,  H05K2201/0269 ,  Y10T428/24868

    摘要： A process for producing a glass substrate having a circuit pattern is disclosed. The process includes forming a thin film layer on a glass substrate and then irradiating the thin film layer with laser light to form a circuit pattern on the glass substrate; depositing a low-melting point glass having a softening point of from 450 to 630° C. on the glass substrate having the circuit pattern formed thereon; and sintering the low-melting point glass to form a low-melting point glass layer which includes the low-melting point glass sintered on the glass substrate having the circuit pattern formed thereon and which forms a compatible layer between the glass substrate and the low-melting point glass layer.

    摘要翻译： 公开了一种具有电路图案的玻璃基板的制造方法。 该方法包括在玻璃基板上形成薄膜层，然后用激光照射薄膜层，以在玻璃基板上形成电路图案; 在其上形成有电路图案的玻璃基板上沉积软化点为450〜630℃的低熔点玻璃; 并烧结低熔点玻璃以形成低熔点玻璃层，该低熔点玻璃层包括在其上形成有电路图案的玻璃基板上烧结的低熔点玻璃，并且在玻璃基板和低熔点玻璃之间形成相容层， 熔点玻璃层。

    Method for manufacturing circuit pattern-provided substrate
    2.
    发明授权
    Method for manufacturing circuit pattern-provided substrate 有权
    制造电路图形衬底的方法

    公开(公告)号：US08418359B2

    公开(公告)日：2013-04-16

    申请号：US12364314

    申请日：2009-02-02

    申请人： Ryohei Satoh ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    发明人： Ryohei Satoh ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    IPC分类号： H05K3/02 ,  H05K3/10

    CPC分类号： G03F7/2022 ,  H01J9/02 ,  H01J11/10 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155

    摘要： A method for manufacturing a circuit pattern-provided substrate including forming a resist layer on a substrate, forming an opening corresponding to a circuit pattern and having an eaves cross-sectional shape in the resist layer, forming a thin film layer having a portion formed on the substrate in the opening and a portion formed on the resist layer, and removing the resist layer such that the resist layer and the portion of the thin film layer formed on the resist layer are removed from the substrate. The forming of the opening comprises exposing the resist layer with a mask device which changes an exposure amount of the resist layer such that the eaves cross-sectional shape has a space at a boundary between the resist layer and the substrate.

    摘要翻译： 一种制造电路图形衬底的方法，包括在衬底上形成抗蚀剂层，形成与电路图形相对应的开口，并且在抗蚀剂层中具有檐形横截面形状，形成薄膜层，该薄膜层形成在 开口中的基板和形成在抗蚀剂层上的部分，并且去除抗蚀剂层，使得抗蚀剂层和形成在抗蚀剂层上的薄膜层的部分从基板上去除。 开口的形成包括用改变抗蚀剂层的曝光量的掩模装置曝光抗蚀剂层，使得檐横截面形状在抗蚀剂层和基底之间的边界处具有空间。

    ELECTRONIC CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME
    3.
    发明申请
    ELECTRONIC CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME 有权
    电子电路装置及其制造方法

    公开(公告)号：US20090205851A1

    公开(公告)日：2009-08-20

    申请号：US12364314

    申请日：2009-02-02

    申请人： Ryohei SATOH ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    发明人： Ryohei SATOH ,  Koji Nakagawa ,  Eiji Morinaga ,  Reo Usui ,  Kenji Tanaka ,  Satoru Takaki ,  Kenichi Ebata ,  Hiroshi Sakamoto

    IPC分类号： H05K1/00 ,  G03F7/00

    CPC分类号： G03F7/2022 ,  H01J9/02 ,  H01J11/10 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155

    摘要： The present invention is to provide a method for manufacturing a circuit pattern-provided transparent substrate having a circuit pattern which is free from pattern peeling and remaining of resist and has good pattern precision and which does not cause disconnection when used as an electrode of an electron circuit or the like. The invention relates to a method for manufacturing a circuit pattern-provided substrate, in which a desired circuit pattern comprising a thin film layer is formed on a substrate, which method includes: a step of forming a resist layer on the substrate; a step of forming an opening of a shape corresponding to a desired circuit pattern in the resist layer; a step of forming a thin film layer; and a step of peeling off the resist layer and the thin film layer formed on the resist layer, wherein the cross-sectional shape in the opening of the resist layer has a cross-sectional shape of eaves type having a space at a boundary part between the resist layer and the substrate, the height and the width of the space are determined such that when the thin film layer is formed in the thin film layer forming step, an end of the thin film layer formed on the substrate in the opening does not go up onto a foot of the resist layer.

    摘要翻译： 本发明提供一种制造具有电路图案的透明基板的方法，该透明基板具有无图案剥离和残留抗蚀剂的电路图案，并且具有良好的图案精度，并且当用作电子的电极时不会断开 电路等。 本发明涉及一种用于制造电路图形提供的基板的方法，其中在基板上形成包括薄膜层的期望的电路图案，该方法包括：在基板上形成抗蚀剂层的步骤; 在抗蚀剂层中形成与期望的电路图形相对应的形状的开口的步骤; 形成薄膜层的步骤; 以及剥离形成在抗蚀剂层上的抗蚀剂层和薄膜层的步骤，其中抗蚀剂层的开口中的横截面形状具有檐形的横截面形状，在其间的边界部分具有空间 确定抗蚀剂层和基板，空间的高度和宽度，使得当在薄膜层形成步骤中形成薄膜层时，开口中形成在基板上的薄膜层的端部不 爬到抗蚀剂层的脚下。

    Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same
    6.
    发明申请
    Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same 失效
    图案形成方法，由其制造的电子电路和使用其的电子装置

    公开(公告)号：US20060240338A1

    公开(公告)日：2006-10-26

    申请号：US11431504

    申请日：2006-05-11

    申请人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Reo Usui

    发明人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Reo Usui

    IPC分类号： G03C5/00 ,  G03F1/00

    CPC分类号： H01L21/76838 ,  H01L21/0272

    摘要： There is provided a method for forming a continuous thin film circuit pattern with good precision, at low cost and with low environmental burden; an electronic circuit fabricated by the same, and an electronic device including the same. There are a step for forming a mask layer 2 on a substrate 1; a step for forming an opening pattern in the mask layer 2; a step for forming a thin film 3 on the substrate 1 and on the mask layer 2; and a step for removing, from the substrate 1, the mask layer 2 and a portion of the thin film 3 formed on the mask layer 2; wherein the opening pattern is formed under a dry condition.

    摘要翻译： 提供了一种以低成本，低环境负荷精度良好地形成连续薄膜电路图案的方法。 由其制造的电子电路和包括该电子电路的电子设备。 在基板1上形成掩模层2的步骤; 用于在掩模层2中形成开口图案的步骤; 在基板1和掩模层2上形成薄膜3的工序; 以及从基板1除去掩模层2和形成在掩模层2上的薄膜3的一部分的步骤; 其中所述开口图案在干燥条件下形成。

    Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same
    7.
    发明授权
    Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same 失效
    图案形成方法，由其制造的电子电路和使用其的电子装置

    公开(公告)号：US07790358B2

    公开(公告)日：2010-09-07

    申请号：US11431504

    申请日：2006-05-11

    申请人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Reo Usui

    发明人： Ryohei Satoh ,  Yoshinori Iwata ,  Koji Nakagawa ,  Reo Usui

    IPC分类号： H01L21/00

    CPC分类号： H01L21/76838 ,  H01L21/0272

    摘要： There is provided a method for forming a continuous thin film circuit pattern with good precision, at low cost and with low environmental burden; an electronic circuit fabricated by the same, and an electronic device including the same.There are a step for forming a mask layer 2 on a substrate 1; a step for forming an opening pattern in the mask layer 2; a step for forming a thin film 3 on the substrate 1 and on the mask layer 2; and a step for removing, from the substrate 1, the mask layer 2 and a portion of the thin film 3 formed on the mask layer 2; wherein the opening pattern is formed under a dry condition.

    摘要翻译： 提供了一种以低成本，低环境负荷精度良好地形成连续薄膜电路图案的方法。 由其制造的电子电路和包括该电子电路的电子设备。 在基板1上形成掩模层2的步骤; 用于在掩模层2中形成开口图案的步骤; 在基板1和掩模层2上形成薄膜3的工序; 以及从基板1除去掩模层2和形成在掩模层2上的薄膜3的一部分的步骤; 其中所述开口图案在干燥条件下形成。