公开(公告)号：US10706920B2

公开(公告)日：2020-07-07

申请号：US16100295

申请日：2018-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chea Ouk Lim ,  Tae Hui Na ,  Jung Sunwoo ,  Yong Jun Lee

IPC: G11C13/00 ,  G11C11/56

Abstract: A memory device includes: a memory cell array including a plurality of memory cells, wherein each of the plurality of memory cells includes a switching element, and a data storage element connected to the switching element, wherein the data storage element includes a phase change material; and a memory controller configured to perform a control operation with respect to a first memory cell of the plurality of memory cells by inputting an operating current to the first memory cell, and inputting a compensation current flowing from the data storage element to the switching element in the first memory cell before or after inputting the operating current to the first memory cell.

公开(公告)号：US10181348B2

公开(公告)日：2019-01-15

申请号：US15677055

申请日：2017-08-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Kook Park ,  Young Hoon Oh ,  Chi Weon Yoon ,  Yong Jun Lee ,  Chea Ouk Lim

IPC: G11C7/00 ,  G11C13/00 ,  G11C7/10

Abstract: A resistive memory element or device includes: a first, main, memory cell area including a plurality of first resistive memory cells; and a second, buffer, memory cell area including a plurality of second resistive memory cells. The first resistive memory cells of the main memory cell area are configured to store data therein, and the second resistive memory cells of the buffer memory cell area are configured to temporarily store portions of the data therein for at least a stabilization time period while the portions of the data stabilize in the main memory cell area.

公开(公告)号：US10074426B2

公开(公告)日：2018-09-11

申请号：US15677052

申请日：2017-08-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chea Ouk Lim ,  Hyun Kook Park ,  Jung Sunwoo ,  Young Hoon Oh ,  Yong Jun Lee

IPC: G11C13/00 ,  G06F11/10 ,  G11C29/52

CPC classification number: G11C13/0069 ,  G06F11/1048 ,  G06F11/1068 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C29/52 ,  G11C2013/0076 ,  G11C2029/0411 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/76 ,  G11C2213/79

Abstract: A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.

公开(公告)号：US10720209B2

公开(公告)日：2020-07-21

申请号：US16210279

申请日：2018-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Kook Park ,  Young Hoon Oh ,  Chi Weon Yoon ,  Yong Jun Lee ,  Chea Ouk Lim

IPC: G11C13/00 ,  G11C7/10

Abstract: A resistive memory element or device includes: a first, main, memory cell area including a plurality of first resistive memory cells; and a second, buffer, memory cell area including a plurality of second resistive memory cells. The first resistive memory cells of the main memory cell area are configured to store data therein, and the second resistive memory cells of the buffer memory cell area are configured to temporarily store portions of the data therein for at least a stabilization time period while the portions of the data stabilize in the main memory cell area.

公开(公告)号：US10580488B2

公开(公告)日：2020-03-03

申请号：US16034850

申请日：2018-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chea Ouk Lim ,  Tae Hui Na ,  Jung Sunwoo ,  Yong Jun Lee

IPC: G11C13/00

Abstract: A memory device including: a memory cell array, including a memory cell having a switch element and a data storage element connected to the switch element, wherein the data storage element has a phase change material; and a memory controller for inputting a first read current to the memory cell to detect a first read voltage, inputting a second read current to the memory cell to detect a second read voltage, and inputting a compensation current to the memory cell, wherein the compensation current lowers a resistance value of the data storage element, the compensation current is input when a first state of the memory cell is different from a second state of the memory cell, the first state is determined using the first read voltage and the second state is determined using the second read voltage.

公开(公告)号：US20190172531A1

公开(公告)日：2019-06-06

申请号：US16034850

申请日：2018-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chea Ouk Lim ,  Tae Hui Na ,  Jung Sunwoo ,  Yong Jun Lee

IPC: G11C13/00

CPC classification number: G11C13/0004 ,  G11C13/003 ,  G11C13/0033 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0047 ,  G11C2013/0057 ,  G11C2213/15 ,  G11C2213/72

Abstract: A memory device including: a memory cell array, including a memory cell having a switch element and a data storage element connected to the switch element, wherein the data storage element has a phase change material; and a memory controller for inputting a first read current to the memory cell to detect a first read voltage, inputting a second read current to the memory cell to detect a second read voltage, and inputting a compensation current to the memory cell, wherein the compensation current lowers a resistance value of the data storage element, the compensation current is input when a first state of the memory cell is different from a second state of the memory cell, the first state is determined using the first read voltage and the second state is determined using the second read voltage.