公开(公告)号：US20170330727A1

公开(公告)日：2017-11-16

申请号：US15453595

申请日：2017-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： YEONGKWANG LEE ,  YONGKYUN PARK ,  DONGSOO LEE ,  SANGHEON LEE

IPC: H01J37/32 ,  H01L21/67

CPC classification number: H01J37/3222 ,  H01J37/32238 ,  H01J37/3244 ,  H01J2237/002

Abstract: Embodiments of the inventive concepts provide an antenna, a microwave plasma source including the antenna, a plasma processing apparatus including the antenna, and a method of manufacturing method of a semiconductor device. The antenna includes a lower ring having a plurality of output slits, and an upper ring disposed on the lower ring. The upper ring has an input slit transmitting microwave power from an outside of the upper ring onto the lower ring. The upper ring is configured to rotate with respect to the lower ring.

公开(公告)号：US20250022995A1

公开(公告)日：2025-01-16

申请号：US18772193

申请日：2024-07-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ilseop Won ,  Changhoon Kwak ,  Chulsoo Yoon ,  DONGSOO LEE ,  Seunggyun Jung ,  Sujong Han

IPC: H01L33/60 ,  H01L25/075 ,  H01L33/62

Abstract: A light-emitting device package includes a circuit board, a light-emitting device mounted on the circuit board, a reflective sheet disposed on the circuit board, the reflective sheet including an opening penetrating through the reflective sheet, wherein the light-emitting device is disposed within the opening, an inclined portion surrounding the opening when viewed in a plan view, and being inclined at a first angle with respect to an upper surface of the circuit board, and a flat extension portion surrounding the inclined portion when viewed in a plan view, and being parallel to the upper surface of the circuit board, and a diffuser plate disposed at a first vertical distance from the upper surface of the circuit board. An air gap is disposed between the upper surface of the circuit board and the flat extension portion.

公开(公告)号：US20240274480A1

公开(公告)日：2024-08-15

申请号：US18472364

申请日：2023-09-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYEON JOON KIM ,  DONGSOO LEE ,  SUNGHYUN KIM

IPC: H01L21/66

CPC classification number: H01L22/34 ,  H01L22/12 ,  H01L22/22

Abstract: A method of operating an electronic device for detecting a defect due to a particle in an equipment generated during a bonding process of a semiconductor chip is disclosed. For example, the method may include obtaining, by the electronic device, profile data including operation information of the equipment from the equipment during the bonding process. Additionally, the method may include calculating, by the electronic device, characteristic data of bonded chips (e.g., from the bonding process) by pre-processing the profile data. Subsequently, after the bonding process is completed, the method may include selecting, by the electronic device, a coordinate of a defective chip on a substrate as a defect coordinate by comparing result data of a reference chip and peripheral chips based on the characteristic data. In some embodiments, the result data may include respective height value information of the bonded chips.

公开(公告)号：US20180374926A1

公开(公告)日：2018-12-27

申请号：US15861949

申请日：2018-01-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： DONGSOO LEE ,  WONKEUN CHUNG ,  HOONJOO NA ,  SUYOUNG BAE ,  JAEYEOL SONG ,  JONGHAN LEE ,  HYUNGSUK JUNG ,  SANGJIN HYUN

IPC: H01L29/49 ,  H01L29/36

Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor.