公开(公告)号：US20240128347A1

公开(公告)日：2024-04-18

申请号：US18397700

申请日：2023-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Gyu CHO ,  Rak Hwan KIM ,  Hyeok-Jun SON ,  Do Sun LEE ,  Won Keun CHUNG

IPC: H01L29/49 ,  H01L21/28 ,  H01L21/311 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/4983 ,  H01L21/28132 ,  H01L21/31111 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78696

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

公开(公告)号：US20220285518A1

公开(公告)日：2022-09-08

申请号：US17826380

申请日：2022-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Gyu CHO ,  Rak Hwan KIM ,  Hyeok-Jun SON ,  Do Sun LEE ,  Won Keun CHUNG

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/28 ,  H01L21/311 ,  H01L29/786

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

公开(公告)号：US20210210613A1

公开(公告)日：2021-07-08

申请号：US17015296

申请日：2020-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Gyu CHO ,  Rak Hwan KIM ,  Hyeok-Jun SON ,  Do Sun LEE ,  Won Keun CHUNG

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28 ,  H01L21/311 ,  H01L29/66

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

公开(公告)号：US20180090495A1

公开(公告)日：2018-03-29

申请号：US15473031

申请日：2017-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do Sun LEE ,  Joon Gon LEE ,  Na Rae KIM ,  Chul Sung KIM ,  Do Hyun LEE ,  Ryuji TOMITA ,  Sang Jin HYUN

IPC: H01L27/092 ,  H01L29/165 ,  H01L29/45 ,  H01L29/417 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/02 ,  H01L21/285

CPC classification number: H01L27/0924 ,  H01L21/02532 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823871 ,  H01L21/823878 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/4175 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7856

Abstract: Semiconductor devices may have a first semiconductor element including first active regions that are doped with a first conductivity-type impurity and that are on a semiconductor substrate, a first gate structure between the first active regions, and first contacts connected to the first active regions, respectively; and a second semiconductor element including second active regions that are doped with a second conductivity-type impurity different from the first conductivity-type impurity and that are on the semiconductor substrate, a second gate structure between the second active regions, and second contacts connected to the second active regions, respectively, and having a second length greater than a first length of each of the first contacts in a first direction parallel to an upper surface of the semiconductor substrate.

公开(公告)号：US20250072096A1

公开(公告)日：2025-02-27

申请号：US18606375

申请日：2024-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Woong SHIM ,  Seong Heum CHOI ,  Do Sun LEE ,  Hyo Seok CHOI ,  Rak Hwan KIM ,  Chung Hwan SHIN

IPC: H01L21/8234 ,  H01L21/308 ,  H01L21/768 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A method of fabricating a semiconductor device includes: forming an active pattern on a substrate, forming a source/drain pattern on the active pattern, forming a contact hole on the source/drain pattern, forming a contact barrier layer, which has an upper surface of a first height based on a bottom surface of the contact hole, in the contact hole, forming a passivation layer on the contact barrier layer in the contact hole, forming a mask layer on the passivation layer in the contact hole, removing an upper portion of the contact barrier layer so that an upper surface of the contact barrier layer has a second height lower than the first height, removing the passivation layer and the mask layer, and forming a contact filling layer, which covers the upper surface of the contact barrier layer and fills the contact hole, in the contact hole.

公开(公告)号：US20240405090A1

公开(公告)日：2024-12-05

申请号：US18390782

申请日：2023-12-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong Heum CHOI ,  Jeong Hoon SEO ,  Rak Hwan KIM ,  Chung Hwan SHIN ,  Do Sun LEE

IPC: H01L29/45 ,  H01L21/285 ,  H01L29/40

Abstract: A semiconductor device is provided. The semiconductor device includes: a semiconductor device including: an active pattern extending in a first direction; a gate structure including a gate electrode extending in a second direction and a gate spacer on the active pattern, wherein the gate electrode and the gate spacer are spaced apart from each other in the first direction; a source/drain pattern on the active pattern; a contact barrier layer on the source/drain pattern; and a contact filling layer on the contact barrier layer. An uppermost point of the contact barrier layer is between an upper surface of the contact filling layer and a lower surface of the contact filling layer, and outer walls of the contact barrier layer and outer walls of the contact filling layer extend along a common plane.

公开(公告)号：US20220319916A1

公开(公告)日：2022-10-06

申请号：US17838740

申请日：2022-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Keun CHUNG ,  Joon Gon LEE ,  Rak Hwan KIM ,  Chung Hwan SHIN ,  Do Sun LEE ,  Nam Gyu CHO

IPC: H01L21/768

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.