公开(公告)号：US20170358545A1

公开(公告)日：2017-12-14

申请号：US15440621

申请日：2017-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JU-IL CHOI ,  HYOJU KIM ,  KWANGJIN MOON ,  SUJEONG PARK ,  JUBIN SEO ,  NAEIN LEE ,  HO-JIN LEE

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05564 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13026 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/16237 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A pad is disposed on a substrate. A bump structure is disposed on the pad and electrically connected to the pad. The bump structure includes a first copper layer and a second copper layer sequentially stacked on the pad and a solder ball on the second copper layer. A first X-ray diffraction (XRD) peak intensity ratio of (111) plane to (200) plane of the first copper layer is greater than a second XRD peak intensity ratio of (111) plane to (200) plane of the second copper layer.

公开(公告)号：US20240038708A1

公开(公告)日：2024-02-01

申请号：US18120026

申请日：2023-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： KUNSANG PARK ,  HO-JIN LEE ,  SEOKHO KIM

IPC: H01L23/00

CPC classification number: H01L24/16 ,  H01L24/11 ,  H01L24/13 ,  H01L24/80 ,  H01L2224/11452 ,  H01L2224/13016 ,  H01L2224/13147 ,  H01L2224/13187 ,  H01L2224/16145 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A semiconductor device may include a lower structure including a first substrate, a first pad on the first substrate, and a first insulating layer enclosing the first pad, and an upper structure including a second substrate, a second pad on the second substrate, and a second insulating layer enclosing the second pad. Each of the first and second pads may include a first portion and a second portion on the first portion. The second portion may include the same metallic material as the first portion. The second portion of the first pad may be in contact with the second portion of the second pad, and the first insulating layer may be in contact with the second insulating layer.

公开(公告)号：US20250038149A1

公开(公告)日：2025-01-30

申请号：US18428931

申请日：2024-01-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNGJUN JEON ,  HO-JIN LEE

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L25/18

Abstract: A semiconductor package includes a first chip and a second chip disposed thereon. The first chip includes a first semiconductor substrate including first and second surfaces, a first circuit layer disposed on the first surface, a first interconnection layer disposed on the first circuit layer, the first interconnection layer including a landing pad, a second interconnection layer disposed on the second surface, and a first penetration via protruding from the second interconnection layer and penetrating the first semiconductor substrate. The second chip includes a second semiconductor substrate including third and fourth surfaces, the fourth surface being closer to the first chip than the third surface, a third interconnection layer disposed on the fourth surface, a second circuit layer disposed between the third interconnection layer and the fourth surface, and a second penetration via penetrating the second semiconductor substrate and connected to the landing pad.