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13 条记录 (耗时 0.016 秒)

    Sense amplifier having offset cancellation
    2.
    发明授权
    Sense amplifier having offset cancellation 有权

    公开(公告)号：US10803925B2

    公开(公告)日：2020-10-13

    申请号：US16829044

    申请日：2020-03-25

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Young-Wook Kim ,  Hyuk-Joon Kwon ,  Sang-Keun Han ,  Bok-Yeon Won

    IPC分类号： G11C11/4091 ,  G11C7/06 ,  G11C11/4094 ,  G11C11/4097 ,  G11C5/02 ,  G11C7/02 ,  G11C5/06 ,  G11C11/4096 ,  G11C11/408

    摘要： A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

    Sense amplifier having offset cancellation
    5.
    发明授权
    Sense amplifier having offset cancellation 有权

    公开(公告)号：US10541022B2

    公开(公告)日：2020-01-21

    申请号：US16256883

    申请日：2019-01-24

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Young-Wook Kim ,  Hyuk-Joon Kwon ,  Sang-Keun Han ,  Bok-Yeon Won

    IPC分类号： G11C5/02 ,  G11C5/06 ,  G11C7/06 ,  G11C11/4091 ,  G11C7/02 ,  G11C11/4094 ,  G11C11/4097 ,  G11C11/4096 ,  G11C11/408

    摘要： A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

    Bit line equalizing circuit
    6.
    发明授权
    Bit line equalizing circuit 有权
    位线均衡电路

    公开(公告)号：US09318169B2

    公开(公告)日：2016-04-19

    申请号：US14326543

    申请日：2014-07-09

    申请人： Samsung Electronics Co., Ltd.

    发明人： Bok-Yeon Won ,  Hyuk-Joon Kwon

    IPC分类号： G11C7/00 ,  G11C7/12 ,  G11C11/4094 ,  H01L27/02 ,  H01L27/108

    CPC分类号： G11C7/12 ,  G11C11/4094 ,  H01L27/0207 ,  H01L27/10897

    摘要： There is provided a bit line equalizing circuit including: an active region; a first bit line disposed on the active region in a first direction; a second bit line disposed on the active region in the first direction; a gate pattern including a first pattern disposed on the active region in a second direction crossing the first direction, and a second pattern extended from one side of the first pattern to be disposed in the first direction, and formed in a stair shape; a first contact disposed at one side of the first pattern and one side of the second pattern, and configured to connect the active region and the first bit line; a second contact disposed at one side of the first pattern and the other side of the second pattern, and configured to connect the active region and the second bit line; and a third contact disposed at the other side of the first pattern, and configured to provide a predetermined voltage to the active region.

    摘要翻译： 提供了一种位线均衡电路，包括：有源区; 在第一方向上设置在有源区上的第一位线; 在所述有源区域上沿所述第一方向设置的第二位线; 形成在第一方向上的第二方向上的第一图案和从第一图案的一侧向第一方向延伸的第二图案，形成为阶梯状; 第一触点，其设置在所述第一图案的一侧和所述第二图案的一侧，并且被配置为连接所述有源区域和所述第一位线; 设置在所述第一图案的一侧和所述第二图案的另一侧的第二触点，并且被配置为连接所述有源区域和所述第二位线; 以及设置在所述第一图案的另一侧的第三触点，并且被配置为向所述有源区域提供预定电压。

    Sense amplifier having offset cancellation
    7.
    发明授权
    Sense amplifier having offset cancellation 有权

    公开(公告)号：US11043257B2

    公开(公告)日：2021-06-22

    申请号：US16989207

    申请日：2020-08-10

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Young-Wook Kim ,  Hyuk-Joon Kwon ,  Sang-Keun Han ,  Bok-Yeon Won

    IPC分类号： G11C11/4091 ,  G11C5/02 ,  G11C7/02 ,  G11C11/4094 ,  G11C11/4097 ,  G11C11/4096 ,  G11C11/408 ,  G11C5/06 ,  G11C7/06

    摘要： A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

    Sense amplifier having offset cancellation
    10.
    发明授权
    Sense amplifier having offset cancellation 有权

    公开(公告)号：US10692565B2

    公开(公告)日：2020-06-23

    申请号：US16707738

    申请日：2019-12-09

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Young-Wook Kim ,  Hyuk-Joon Kwon ,  Sang-Keun Han ,  Bok-Yeon Won

    IPC分类号： G11C11/4091 ,  G11C7/06 ,  G11C11/4097 ,  G11C11/4094 ,  G11C7/02 ,  G11C5/02 ,  G11C11/4096 ,  G11C5/06 ,  G11C11/408

    摘要： A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.