公开(公告)号：US20150070807A1

公开(公告)日：2015-03-12

申请号：US14290038

申请日：2014-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Jin BAEK ,  Shin-Wung BANG ,  Jong-Hyeok YOUN ,  Kwang-Woo LEE

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: A system detects Electro Static Discharge (ESD) of an electronic device by sensing a ground voltage of an electronic device, comparing the sensed ground voltage with a predetermined reference voltage and if the sensed ground voltage exceeds the reference voltage, performs at least one predetermined operation of the electronic device.

Abstract translation: 系统通过感测电子设备的接地电压来检测电子设备的静电放电（ESD），将感测到的接地电压与预定参考电压进行比较，并且如果检测到的接地电压超过参考电压，则执行至少一个预定操作 的电子设备。

公开(公告)号：US20170011967A1

公开(公告)日：2017-01-12

申请号：US15171120

申请日：2016-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hyun YEO ,  Jae-Suk KWON ,  Kwang-Woo LEE ,  Eun-Seong LEE

IPC: H01L21/8238 ,  H01L21/324 ,  H01L29/66 ,  H01L21/265

CPC classification number: H01L21/823814 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/324 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823821 ,  H01L21/823864 ,  H01L21/823871 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7833

Abstract: A method of manufacturing a semiconductor device includes forming a first gate structure on a substrate, the first gate structure including a gate insulation layer, a gate electrode, and a hard mask sequentially stacked on the substrate, forming a preliminary spacer layer on sidewalls of the first gate structure and the substrate, the preliminary spacer layer including silicon nitride, implanting molecular ions into the preliminary spacer layer to form a spacer layer having a dielectric constant lower than a dielectric constant of the preliminary spacer layer, anisotropically etching the spacer layer to form spacers on the sidewalls of the first gate structure, and forming impurity regions at upper portions of the substrate adjacent to the first gate structure.

Abstract translation: 一种制造半导体器件的方法包括在衬底上形成第一栅极结构，所述第一栅极结构包括依次层叠在所述衬底上的栅极绝缘层，栅电极和硬掩模，在所述衬底的侧壁上形成预备间隔层 第一栅极结构和衬底，初步间隔层包括氮化硅，将分子离子注入到初步间隔层中以形成介电常数低于预备间隔层的介电常数的间隔层，各向异性地蚀刻间隔层以形成 在第一栅极结构的侧壁上的间隔物，以及在与第一栅极结构相邻的衬底的上部处形成杂质区。

公开(公告)号：US20200075854A1

公开(公告)日：2020-03-05

申请号：US16426216

申请日：2019-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ilmok PARK ,  Kyusul PARK ,  Seulji SONG ,  Kwang-Woo LEE

IPC: H01L45/00 ,  H01L27/24 ,  G11C13/00

Abstract: A variable resistance memory device includes a word line extending in a first direction, a bit line on the word line and extending in a second direction intersecting the first direction, a switching pattern between the bit line and the word line, a phase change pattern between the switching pattern and the word line, and a bottom electrode between the phase change pattern and the word line, wherein the phase change pattern has a bottom area greater than a top area of the bottom electrode, a thickness of the phase change pattern being greater than a thickness of the bottom electrode, and wherein the bottom and top areas are defined in the first and second directions, and the thicknesses are defined in a third direction intersecting the first and second directions.

公开(公告)号：US20140140154A1

公开(公告)日：2014-05-22

申请号：US14071757

申请日：2013-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-Jeong KIM ,  Kabyong KIM ,  Kwang-Woo LEE ,  Heon LEE ,  Inho CHO

IPC: G11C11/406

CPC classification number: G11C11/40603 ,  G11C11/406 ,  G11C16/3418 ,  G11C29/82 ,  G11C2211/4063

Abstract: A refresh leveraging driving method is provided which includes deciding a unit of word lines to be driven at a refresh leveraging operation to be the same as a redundancy repair row unit setting a lower row address of an input refresh leveraging address corresponding to the decided refresh leveraging row driving unit to a don't care state; and internally generating the don't care lower row address of the refresh leveraging address to drive word lines according to a combined refresh leveraging address.

Abstract translation: 提供了一种刷新利用驱动方法，其包括将刷新利用操作中要驱动的字线的单位确定为与冗余修复行单元相同的冗余修复行单元，该冗余修复行单元设置与所决定的刷新利用相对应的输入刷新利用地址的较低行地址 行驱动单位到不关心状态; 并且根据组合的刷新利用地址在内部生成不关心刷新利用地址的较低行地址来驱动字线。

公开(公告)号：US20190123102A1

公开(公告)日：2019-04-25

申请号：US15967869

申请日：2018-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Si-Ho SONG ,  II Mok PARK ,  Kwang-Woo LEE ,  Se Gab KWON

IPC: H01L27/24 ,  H01L45/00 ,  H01L27/22 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10 ,  H01F10/32

Abstract: A non-volatile memory device includes a substrate, a first electrode on the substrate, a second electrode on the substrate, a selection layer between the first electrode and the second electrode, and a memory layer contacting any one of the first electrode and the second electrode. The first electrode has a first width in a first direction. The second electrode is spaced apart from the first electrode in a second direction perpendicular to the first direction. The second electrode has a second width in the first direction. The selection element layer includes a first doped layer that contacts the first electrode. The first doped layer includes an impurity at a first concentration. The selection element layer includes a second doped layer that contacts the second electrode. The second doped layer includes the impurity at a second concentration lower than the first concentration.