SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20190355744A1

    公开(公告)日:2019-11-21

    申请号:US16526139

    申请日:2019-07-30

    Abstract: A semiconductor device includes a plurality of channel structures on a substrate, each channel structure extending in a first direction perpendicular to the substrate, and having a gate insulating layer and a channel layer, a common source extension region including a first semiconductor layer having an n-type conductivity between the substrate and the channel structures, a plurality of gate electrodes on the common source extension region and spaced apart from each other on a sidewall of each of the channel structures in the first direction, and a common source region on the substrate in contact with the common source extension region and including a second semiconductor layer having an n-type conductivity, wherein the gate insulating layer of each of the channel structures extends to cover an upper surface and at least a portion of a bottom surface of the common source extension region.

    DISPLAY DEVICE
    4.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20200053891A1

    公开(公告)日:2020-02-13

    申请号:US16499694

    申请日:2018-10-19

    Abstract: A display device is disclosed. The display device comprises: a display unit for displaying an image; a support for supporting the display unit; and a rotating unit for rotatably connecting the display unit to one surface part of the support; wherein the rotating unit rotates the display unit after tilting the same in a first tilting direction with respect to the one surface part of the support.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20180374869A1

    公开(公告)日:2018-12-27

    申请号:US15993756

    申请日:2018-05-31

    CPC classification number: H01L27/11582 H01L27/11565 H01L29/0847 H01L29/7827

    Abstract: A semiconductor device includes a plurality of channel structures on a substrate, each channel structure extending in a first direction perpendicular to the substrate, and having a gate insulating layer and a channel layer, a common source extension region including a first semiconductor layer having an n-type conductivity between the substrate and the channel structures, a plurality of gate electrodes on the common source extension region and spaced apart from each other on a sidewall of each of the channel structures in the first direction, and a common source region on the substrate in contact with the common source extension region and including a second semiconductor layer having an n-type conductivity, wherein the gate insulating layer of each of the channel structures extends to cover an upper surface and at least a portion of a bottom surface of the common source extension region.

    OVEN AND CONTROL METHOD THEREOF
    8.
    发明申请

    公开(公告)号:US20170082296A1

    公开(公告)日:2017-03-23

    申请号:US15265349

    申请日:2016-09-14

    CPC classification number: F24C15/006 F24C15/02 F24C15/28

    Abstract: An oven and a control method thereof are provided. The oven includes a case including a cooking chamber in an inside thereof, a door hinge-coupled to the case and configured to open and close the cooking chamber, a cooling fan disposed in an upper portion of the inside of the case and configured to discharge air toward a front of the cooking chamber, and a heat blocking unit configured to form a wind shield which blocks high-temperature heat and water vapor discharged from an inside of the cooking chamber by changing a direction of the air discharged through the cooling fan to a lower side of the cooking chamber. In response to the door being closed, a portion of the heat blocking unit is pressed through an upper portion of the door and non-interferes the air discharged toward the front of the cooking chamber and in response to the door being opened, the portion of the heat blocking unit pressed by the upper portion of the door is released and interferes the air discharged toward the front of the cooking chamber to form the wind shield.

    PCB FOR MUF AND MOLDING STRUCTURE OF THE PCB
    9.
    发明申请
    PCB FOR MUF AND MOLDING STRUCTURE OF THE PCB 审中-公开
    印刷电路板用于印刷电路板和模具结构的PCB

    公开(公告)号:US20130161800A1

    公开(公告)日:2013-06-27

    申请号:US13674328

    申请日:2012-11-12

    Abstract: A printed circuit board (PCB) for molded underfill (MUF) and a PCB molding structure that may expand a range of applying the PCB and may resolve a problem of generation of a void during manufacturing of a semiconductor package. The PCB includes: a molding area on which a plurality of semiconductor chips are mounted and that is sealed; and a peripheral area that is formed around the molding area, contacts a mold for molding during a molding process, and includes a first side adjacent to a portion into which a molding material is injected and a second side that faces the first side that is adjacent to a portion from which air may be discharged, wherein an active area where the semiconductor chips are disposed in the molding area is disposed nearer the first side than to the second side.

    Abstract translation: 用于模制底部填充物(MUF)的印刷电路板(PCB)和可以扩大施加PCB的范围的PCB模制结构,并且可以解决在制造半导体封装期间产生空隙的问题。 PCB包括:多个半导体芯片安装在其上并被密封的成型区域; 以及围绕成型区域形成的周边区域,在模制过程中与模具接触,并且包括与模制材料注入的部分相邻的第一侧和面向相邻的第一侧的第二侧 到可以排出空气的部分,其中在模制区域中设置半导体芯片的有源区域设置在比第二侧更靠近第一侧的位置。

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