Cross-point magnetoresistive random memory array and method of making thereof using self-aligned patterning

    公开(公告)号:US12004357B2

    公开(公告)日:2024-06-04

    申请号:US17654768

    申请日:2022-03-14

    CPC classification number: H10B61/10 H10N50/01 H10N50/80

    Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

    Cross-point spin accumulation torque MRAM

    公开(公告)号:US10134457B1

    公开(公告)日:2018-11-20

    申请号:US15692920

    申请日:2017-08-31

    Abstract: Apparatuses, systems, and methods are disclosed for magnetoresistive random access memory. A plurality of read lines are in a read line layer, and a plurality of write lines are in a write line layer. A plurality of spin accumulation lines are in a spin accumulation line layer disposed between a read line layer and a write line layer. Spin accumulation lines may horizontally cross read lines and write lines. A plurality of vertical magnetoresistive random access memory (MRAM) cells may include polarizers and magnetic tunnel junctions. A vertical MRAM cell may include a polarizer coupled between a spin accumulation line and a write line. A vertical MRAM cell may further include a magnetic tunnel junction coupled between a spin accumulation line and a read line, such that the magnetic tunnel junction and the polarizer are vertically aligned.

    Cross-point magnetoresistive random memory array and method of making thereof using self-aligned patterning

    公开(公告)号:US12041787B2

    公开(公告)日:2024-07-16

    申请号:US17654760

    申请日:2022-03-14

    CPC classification number: H10B61/10 H10N50/01 H10N50/80

    Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

    Cross-point magnetoresistive random memory array and method of making thereof using self-aligned patterning

    公开(公告)号:US12004356B2

    公开(公告)日:2024-06-04

    申请号:US17654762

    申请日:2022-03-14

    CPC classification number: H10B61/10 H10N50/01 H10N50/80

    Abstract: A memory device includes a cross-point array of magnetoresistive memory cells. Each magnetoresistive memory cell includes a vertical stack of a selector-containing pillar structure and a magnetic tunnel junction pillar structure. The lateral spacing between neighboring pairs of magnetoresistive memory cells may be smaller along a first horizontal direction than along a second horizontal direction, and a dielectric spacer or a tapered etch process may be used to provide a pattern of an etch mask for patterning first electrically conductive lines underneath the magnetoresistive memory cells. Alternatively, a resist layer may be employed to pattern first electrically conductive lines underneath the cross-point array. Alternatively, a protective dielectric liner may be provided to protect selector-containing pillar structures during formation of the magnetic tunnel junction pillar structures.

Patent Agency Ranking