-
公开(公告)号:US20230055230A1
公开(公告)日:2023-02-23
申请号:US17530861
申请日:2021-11-19
发明人: Ryousuke ITOU , Akihisa SAI , Kenzo IIZUKA
IPC分类号: H01L23/522 , H01L23/532 , H01L27/11556 , H01L27/11582 , H01L21/3213 , H01L21/768
摘要: A vertically alternating sequence of continuous insulating layers and continuous sacrificial material layers is formed over a substrate, and memory opening fill structures including vertical stacks of memory elements are formed through the vertically alternating sequence. Backside trenches are formed to divide the vertically alternating sequence into a plurality of alternating stacks of insulating layers and sacrificial material layers. Bridge structures are formed within each of the backside trenches. The sacrificial material layers are replaced with electrically conductive layers while the bridge structure are present within the backside trenches.
-
公开(公告)号:US20220254733A1
公开(公告)日:2022-08-11
申请号:US17174064
申请日:2021-02-11
发明人: Genta MIZUNO , Kenzo IIZUKA , Satoshi SHIMIZU , Keisuke IZUMI , Tatsuya HINOUE , Yujin TERASAWA , Seiji SHIMABUKURO , Ryousuke ITOU , Yanli ZHANG , Johann ALSMEIER , Yusuke YOSHIDA
IPC分类号: H01L23/00 , H01L23/522 , H01L27/11556 , H01L27/11582
摘要: A three-dimensional memory device includes a first word-line region including a first alternating stack of first word lines and continuous insulating layers, first memory stack structures vertically extending through the first alternating stack, a second word-line region comprising a second alternating stack of second word lines and the continuous insulating layers, second memory stack structures vertically extending through the second alternating stack, plural dielectric separator structures located between the first word-line region and the second word-line region, and at least one bridge region located between the plural dielectric separator structures and between the between the first word-line region and the second word-line region. The continuous insulating layers extend through the at least one bridge region between the first alternating stack in the first word-line region and the second alternating stack in the second word-line region.
-
公开(公告)号:US20220352201A1
公开(公告)日:2022-11-03
申请号:US17523487
申请日:2021-11-10
发明人: Tatsuya HINOUE , Yusuke MUKAE , Ryousuke ITOU , Masanori TSUTSUMI , Akio NISHIDA , Ramy Nashed Bassely SAID
IPC分类号: H01L27/11582 , H01L27/11556
摘要: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.
-
公开(公告)号:US20220109003A1
公开(公告)日:2022-04-07
申请号:US17064834
申请日:2020-10-07
发明人: Noriyuki NAGAHATA , Takashi YUDA , Ryousuke ITOU
IPC分类号: H01L27/11582
摘要: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening. The memory opening fill structure includes a memory film and a vertical semiconductor channel. The memory film includes a tunneling dielectric layer, a charge storage layer that laterally surrounds the tunneling dielectric layer, a dielectric metal oxide blocking dielectric layer that laterally surrounds the charge storage layer and contacts the vertical semiconductor channel, and a silicon oxide blocking dielectric layer that laterally surrounds the dielectric metal oxide blocking dielectric layer and contacts the vertical semiconductor channel.
-
公开(公告)号:US20230057885A1
公开(公告)日:2023-02-23
申请号:US17406463
申请日:2021-08-19
发明人: Ryousuke ITOU , Akihisa SAI , Kenzo IIZUKA
IPC分类号: H01L23/522 , H01L23/532 , H01L27/11556 , H01L27/11582 , H01L21/311 , H01L21/768
摘要: A vertically alternating sequence of continuous insulating layers and continuous sacrificial material layers is formed over a substrate, and memory opening fill structures including vertical stacks of memory elements are formed through the vertically alternating sequence. Backside trenches are formed to divide the vertically alternating sequence into a plurality of alternating stacks of insulating layers and sacrificial material layers. A set of one or more bridge structures including a doped semiconductor material is formed within each of the backside trenches. The sacrificial material layers are replaced with electrically conductive layers while the sets of at least one bridge structure are present within the backside trenches.
-
-
-
-