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公开(公告)号:US20210090992A1
公开(公告)日:2021-03-25
申请号:US16582262
申请日:2019-09-25
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Li LI , Yuki KASAI , Tatsuya HINOUE
IPC: H01L23/522 , H01L27/1157 , H01L27/11565 , H01L27/11582
Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. Annular recesses are formed by laterally recessing the sacrificial material layers around each memory opening. A tubular aluminum oxide spacer is formed at a periphery of each annular recess. A tubular silicon oxycarbide spacer is selectively deposited on each of the tubular aluminum oxide spacers. The tubular silicon oxycarbide spacers are converted into tubular silicon oxide spacers by an oxidation process. Tubular charge storage spacers are formed on inner sidewalls of the tubular silicon oxide spacers. A vertical semiconductor channel is formed over a respective vertical stack of tubular charge storage spacer within each memory opening. The sacrificial material layers are removed to form backside recesses. Electrically conductive material are deposited in the backside recesses to form electrically conductive layers.
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公开(公告)号:US20190287916A1
公开(公告)日:2019-09-19
申请号:US16020008
申请日:2018-06-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Rahul SHARANGPANI , Raghuveer S. MAKALA , Fei ZHOU , Adarsh RAJASHEKHAR , Tatsuya HINOUE , Tomoyuki OBU , Tomohiro UNO , Yusuke MUKAE
IPC: H01L23/532 , H01L27/11556 , H01L27/11582 , H01L21/768 , H01L29/49
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each of the electrically conductive layers includes a stack of a compositionally graded diffusion barrier and a metal fill material portion, and the compositionally graded diffusion barrier includes a substantially amorphous region contacting the interface between the compositionally graded diffusion barrier and a substantially crystalline region that is spaced from the interface by the amorphous region. The substantially crystalline region effectively blocks atomic diffusion, and the amorphous region induces formation of large grains during deposition of the metal fill material portions.
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公开(公告)号:US20240098992A1
公开(公告)日:2024-03-21
申请号:US17932942
申请日:2022-09-16
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Tatsuya HINOUE , Tomohiro UNO
IPC: H01L27/11582 , H01L27/11597 , H01L27/24
CPC classification number: H01L27/11582 , H01L27/11597 , H01L27/2454
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a set of dielectric-metal-oxide blocking dielectric portions located at levels of the electrically conductive layers, a memory material layer, and a vertical semiconductor channel. Each of the electrically conductive layers includes a tubular metal nitride portion and a metal fill material portion, each of the tubular metal nitride portions laterally surrounds and contacts a respective one of the dielectric-metal-oxide blocking dielectric portions, and each metal fill material portion either contacts respective overlying and underlying insulating layers of the insulating layers, or contacts respective upper and lower metal nitride liner portions which have a smaller thickness than the tubular metal nitride portions.
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公开(公告)号:US20220352201A1
公开(公告)日:2022-11-03
申请号:US17523487
申请日:2021-11-10
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Tatsuya HINOUE , Yusuke MUKAE , Ryousuke ITOU , Masanori TSUTSUMI , Akio NISHIDA , Ramy Nashed Bassely SAID
IPC: H01L27/11582 , H01L27/11556
Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.
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公开(公告)号:US20220352200A1
公开(公告)日:2022-11-03
申请号:US17523447
申请日:2021-11-10
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Michiaki SANO , Yusuke MUKAE , Naoki TAKEGUCHI , Yujin TERASAWA , Tatsuya HINOUE , Ramy Nashed Bassely SAID
IPC: H01L27/11582 , H01L27/11556
Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.
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公开(公告)号:US20220285388A1
公开(公告)日:2022-09-08
申请号:US17192668
申请日:2021-03-04
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Zhixin CUI , Tatsuya HINOUE
IPC: H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L27/1157
Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory material layer. A vertical stack of insulating material portions can be provided at levels of the insulating layers to provide a laterally-undulating profile to the memory material layer. Alternatively, a combination of inner insulating spacers and outer insulating spacers can be employed to provide a laterally-undulating profile to the memory material layer.
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公开(公告)号:US20240306386A1
公开(公告)日:2024-09-12
申请号:US18360474
申请日:2023-07-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yusuke MUKAE , Tatsuya HINOUE , Raghuveer S. MAKALA , Shungo ASAEDA
Abstract: A method of forming a memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming memory openings through the alternating stack, forming memory opening fill structures in the memory openings including respective vertical stack of memory elements and a respective vertical semiconductor channel, forming a lateral isolation trench through the alternating stack, forming lateral recesses by removing the sacrificial material layers selective to the insulating layers and the memory opening fill structures, depositing a first tungsten layer in the lateral recesses using a first tungsten deposition process in which a fluorine-containing tungsten precursor gas is used as a reactant, and depositing a second tungsten layer on the first tungsten layer in the lateral recesses using a second tungsten deposition process in which a fluorine-free tungsten precursor gas is used as a reactant.
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公开(公告)号:US20220406379A1
公开(公告)日:2022-12-22
申请号:US17351789
申请日:2021-06-18
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Naoki TAKEGUCHI , Masanori TSUTSUMI , Seiji SHIMABUKURO , Tatsuya HINOUE
IPC: G11C16/04 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/11582 , H01L27/1157 , H01L23/522 , H01L23/528
Abstract: A vertical repetition of multiple instances of a unit layer stack is formed over a substrate. The unit layer stack includes an insulating layer and a sacrificial material layer. Lateral recesses are formed by removing the sacrificial material layers selective to the insulating layers. Each lateral recess is sequentially fill with at least one conductive fill material and an insulating fill material, and vertically-extending portions of the at least one conductive fill material are removed such that a vertical layer stack including a first-type electrically conductive layer, a seamed insulating layer, and a second-type electrically conductive layer are formed in each lateral recess. Memory opening fill structures including a respective vertical stack of memory elements is formed through the insulating layers and the layer stacks. Access points for providing an etchant for removing the sacrificial material layers may be provided by memory openings, contact via cavities or backside trenches.
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公开(公告)号:US20220285387A1
公开(公告)日:2022-09-08
申请号:US17192603
申请日:2021-03-04
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Tatsuya HINOUE , Zhixin CUI
IPC: H01L27/11582 , H01L27/11556
Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory material layer. A vertical stack of insulating material portions can be provided at levels of the insulating layers to provide a laterally-undulating profile to the memory material layer. Alternatively, a combination of inner insulating spacers and outer insulating spacers can be employed to provide a laterally-undulating profile to the memory material layer.
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公开(公告)号:US20220254733A1
公开(公告)日:2022-08-11
申请号:US17174064
申请日:2021-02-11
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Genta MIZUNO , Kenzo IIZUKA , Satoshi SHIMIZU , Keisuke IZUMI , Tatsuya HINOUE , Yujin TERASAWA , Seiji SHIMABUKURO , Ryousuke ITOU , Yanli ZHANG , Johann ALSMEIER , Yusuke YOSHIDA
IPC: H01L23/00 , H01L23/522 , H01L27/11556 , H01L27/11582
Abstract: A three-dimensional memory device includes a first word-line region including a first alternating stack of first word lines and continuous insulating layers, first memory stack structures vertically extending through the first alternating stack, a second word-line region comprising a second alternating stack of second word lines and the continuous insulating layers, second memory stack structures vertically extending through the second alternating stack, plural dielectric separator structures located between the first word-line region and the second word-line region, and at least one bridge region located between the plural dielectric separator structures and between the between the first word-line region and the second word-line region. The continuous insulating layers extend through the at least one bridge region between the first alternating stack in the first word-line region and the second alternating stack in the second word-line region.
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