公开(公告)号：US11935784B2

公开(公告)日：2024-03-19

申请号：US17345315

申请日：2021-06-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fumitaka Amano ,  Yusuke Osawa ,  Kensuke Ishikawa ,  Mitsuteru Mushiga ,  Motoki Kawasaki ,  Shinsuke Yada ,  Masato Miyamoto ,  Syo Fukata ,  Takashi Kashimura ,  Shigehiro Fujino

IPC: H01L21/768 ,  H01L23/00 ,  H01L23/535 ,  H01L25/065 ,  H01L25/18 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76897 ,  H01L23/535 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H10B41/27 ,  H10B43/27 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A vertical layer stack including a bit-line-level dielectric layer and an etch stop dielectric layer can be formed over an array region. Bit-line trenches are formed through the vertical layer stack. Bit-line-trench fill structures are formed in the bit-line trenches. Each of the bit-line-trench fill structures includes a stack of a bit line and a capping dielectric strip. At least one via-level dielectric layer can be formed over the vertical layer stack. A bit-line-contact via cavity can be formed through the at least one via-level dielectric layer and one of the capping dielectric strips. A bit-line-contact via structure formed in the bit-line-contact via cavity includes a stepped bottom surface including a top surface of one of the bit lines, a sidewall segment of the etch stop dielectric layer, and a segment of a top surface of the etch stop dielectric layer.

公开(公告)号：US11538708B2

公开(公告)日：2022-12-27

申请号：US16867818

申请日：2020-05-06

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi Murakami ,  Shigeru Nakatsuka ,  Syo Fukata ,  Yusuke Osawa ,  Shigehiro Fujino ,  Masaaki Higashitani

IPC: H01L21/683 ,  H01L21/67 ,  H01J37/32 ,  H01L21/687

Abstract: An apparatus includes an electrostatic chuck and located within a vacuum enclosure. A plurality of conductive plates can be embedded in the electrostatic chuck, and a plurality of plate bias circuits can be configured to independently electrically bias a respective one of the plurality of conductive plates. Alternatively or additionally, a plurality of spot lamp zones including a respective set of spot lamps can be provided between a bottom portion of the vacuum enclosure and a backside surface of the electrostatic chuck. The plurality of conductive plates and/or the plurality of spot lamp zones can be employed to locally modify chucking force and to provide local temperature control.

公开(公告)号：US11598005B2

公开(公告)日：2023-03-07

申请号：US16868787

申请日：2020-05-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi Murakami ,  Shigeru Nakatsuka ,  Syo Fukata ,  Yusuke Osawa ,  Shigehiro Fujino ,  Masaaki Higashitani

IPC: H01L21/683 ,  C23C16/458 ,  H01L21/02 ,  H01L21/687 ,  H01J37/32 ,  H01L21/033 ,  C23C16/50 ,  C23C16/455

Abstract: A deposition chamber includes a vacuum enclosure, an electrostatic chuck having a flat top surface located within a vacuum enclosure, a lift-and-rotation unit extending through or laterally surrounding the electrostatic chuck at a position that is laterally offset from a vertical axis passing through a geometrical center of the electrostatic chuck, a gas supply manifold configured to provide influx of gas into the vacuum enclosure, and a pumping port connected to the vacuum enclosure.

公开(公告)号：US11551961B2

公开(公告)日：2023-01-10

申请号：US16867845

申请日：2020-05-06

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shoichi Murakami ,  Shigeru Nakatsuka ,  Syo Fukata ,  Yusuke Osawa ,  Shigehiro Fujino ,  Masaaki Higashitani

IPC: H01L21/683 ,  H01J37/32 ,  H01L21/67 ,  H01L21/66 ,  C23C16/509

Abstract: An apparatus includes an electrostatic chuck and located within a vacuum enclosure. A plurality of conductive plates can be embedded in the electrostatic chuck, and a plurality of plate bias circuits can be configured to independently electrically bias a respective one of the plurality of conductive plates. Alternatively or additionally, a plurality of spot lamp zones including a respective set of spot lamps can be provided between a bottom portion of the vacuum enclosure and a backside surface of the electrostatic chuck. The plurality of conductive plates and/or the plurality of spot lamp zones can be employed to locally modify chucking force and to provide local temperature control.

公开(公告)号：US09922987B1

公开(公告)日：2018-03-20

申请号：US15468732

申请日：2017-03-24

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yuki Mizutani ,  James Kai ,  Fumiaki Toyama ,  Shigehiro Fujino ,  Johann Alsmeier

IPC: H01L27/115 ,  H01L27/11548 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582 ,  H01L23/485

CPC classification number: H01L27/11548 ,  H01L23/485 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582

Abstract: Memory stack structures can be formed through an alternating stack of insulating layers and spacer material layers that are formed as, or are subsequently replaced with, electrically conductive layers. The memory stack structures can be formed as rows having a first pitch. Additional insulating layers and at least one drain select level dielectric layer are formed over the alternating stack. Drain select level openings are formed in rows having a smaller second pitch. Partial replacement of the at least one drain select level dielectric layer forms spaced apart electrically conductive line structures that surround a respective plurality of drain select level openings. Drain select level channel portions are subsequently formed in respective drain select level openings.