公开(公告)号：US11532570B2

公开(公告)日：2022-12-20

申请号：US17174064

申请日：2021-02-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Genta Mizuno ,  Kenzo Iizuka ,  Satoshi Shimizu ,  Keisuke Izumi ,  Tatsuya Hinoue ,  Yujin Terasawa ,  Seiji Shimabukuro ,  Ryousuke Itou ,  Yanli Zhang ,  Johann Alsmeier ,  Yusuke Yoshida

IPC: H01L27/11556 ,  H01L23/00 ,  H01L27/11582 ,  H01L23/522

Abstract: A three-dimensional memory device includes a first word-line region including a first alternating stack of first word lines and continuous insulating layers, first memory stack structures vertically extending through the first alternating stack, a second word-line region comprising a second alternating stack of second word lines and the continuous insulating layers, second memory stack structures vertically extending through the second alternating stack, plural dielectric separator structures located between the first word-line region and the second word-line region, and at least one bridge region located between the plural dielectric separator structures and between the between the first word-line region and the second word-line region. The continuous insulating layers extend through the at least one bridge region between the first alternating stack in the first word-line region and the second alternating stack in the second word-line region.

公开(公告)号：US12185540B2

公开(公告)日：2024-12-31

申请号：US17523447

申请日：2021-11-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michiaki Sano ,  Yusuke Mukae ,  Naoki Takeguchi ,  Yujin Terasawa ,  Tatsuya Hinoue ,  Ramy Nashed Bassely Said

IPC: H10B43/27 ,  H10B41/27

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.

公开(公告)号：US10916504B2

公开(公告)日：2021-02-09

申请号：US16441439

申请日：2019-06-14

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke Mukae ,  Naoki Takeguchi ,  Kensuke Yamaguchi ,  Raghuveer S. Makala ,  Yujin Terasawa

IPC: H01L21/28 ,  H01L29/49 ,  H01L27/11582 ,  H01L23/532 ,  H01L21/768

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures are formed through the alternating stack. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. Backside recesses are formed by removing the sacrificial material layers selective to the insulating layers and the memory stack structures. Electrically conductive layers are formed in the backside recesses. Each of the electrically conductive layers includes a molybdenum-containing conductive liner and a metal fill portion including a metal other than molybdenum.

公开(公告)号：US12217965B2

公开(公告)日：2025-02-04

申请号：US17573429

申请日：2022-01-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fei Zhou ,  Rahul Sharangpani ,  Raghuveer S. Makala ,  Yujin Terasawa ,  Naoki Takeguchi ,  Kensuke Yamaguchi ,  Masaaki Higashitani

IPC: H01L21/285 ,  C23C16/14 ,  C23C16/455 ,  H01L21/768 ,  H10B41/27 ,  H10B43/27 ,  H10B51/20 ,  H10B63/00

Abstract: A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

公开(公告)号：US12176203B2

公开(公告)日：2024-12-24

申请号：US17573452

申请日：2022-01-11

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Fei Zhou ,  Rahul Sharangpani ,  Raghuveer S. Makala ,  Yujin Terasawa ,  Naoki Takeguchi ,  Kensuke Yamaguchi ,  Masaaki Higashitani

IPC: H01L21/02 ,  C23C16/458

Abstract: A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

公开(公告)号：US11778818B2

公开(公告)日：2023-10-03

申请号：US16934445

申请日：2020-07-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ryo Mochizuki ,  Yasuo Kasagi ,  Michiaki Sano ,  Junji Oh ,  Yujin Terasawa ,  Hiroaki Namba

IPC: H10B43/27 ,  H10B43/10 ,  H10B43/35 ,  H01L23/522

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B43/10 ,  H10B43/35

Abstract: An alternating stack of insulating layers and electrically conductive layers, a retro-stepped dielectric material portion overlying stepped surfaces of the alternating stack, and memory stack structures extending through the alternating stack are formed over a substrate. A patterned etch mask layer including discrete openings is formed thereabove. Via cavities through an upper region of the retro-stepped dielectric material portion by performing a first anisotropic etch process. Metal plates are selectively formed on physically exposed surfaces of a first subset of the electrically conductive layers by a selective metal deposition process. A subset of the via cavities without any metal plates therein are vertically extended downward by performing a second anisotropic etch process while the metal plates protect underlying electrically conductive layers. Via cavities can be formed without punching through electrically conductive layers. Contact via structures can be formed in the via cavities by depositing at least one conductive material therein.

公开(公告)号：US10608010B2

公开(公告)日：2020-03-31

申请号：US16002265

申请日：2018-06-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yujin Terasawa ,  Genta Mizuno ,  Yusuke Mukae ,  Yoshinobu Tanaka ,  Shiori Kataoka ,  Ryosuke Itou ,  Kensuke Yamaguchi ,  Naoki Takeguchi

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11573

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed with stepped surfaces. Sacrificial metal plates are formed on the top surfaces of the sacrificial material layers, and a retro-stepped dielectric material portion is formed over the sacrificial metal plates. Contact via cavities are formed through the retro-stepped dielectric material portion employing the sacrificial metal plates as etch stop structures. The sacrificial metal plates are replaced with portions of insulating spacer layers. Sacrificial via fill structures within remaining volumes of the contact via cavities. The sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are replaced with portions of staircase-region contact via structures that contact the electrically conductive layers.