公开(公告)号：US09515179B2

公开(公告)日：2016-12-06

申请号：US14690703

申请日：2015-04-20

申请人： Semiconductor Components Industries, LLC

发明人： Peter Moens ,  Piet Vanmeerbeek ,  John Michael Parsey, Jr.

IPC分类号： H01L29/00 ,  H01L29/78 ,  H01L29/66 ,  H01L29/20 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08

CPC分类号： H01L29/7827 ,  H01L21/28264 ,  H01L29/0603 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/66522 ,  H01L29/66666

摘要： An electronic device can include a vertical III-V transistor having a gate electrode and a channel region within a homostructure. The channel region can be disposed between a first portion and a second portion of the gate electrode. In an embodiment, the III-V transistor can be an enhancement-mode GaN transistor, and in a particular embodiment, the drain, source, and channel regions can include the same conductivity type.

摘要翻译： 电子器件可以包括具有栅电极和同构结构内的沟道区的垂直III-V晶体管。 沟道区可以设置在栅电极的第一部分和第二部分之间。 在一个实施例中，III-V晶体管可以是增强型GaN晶体管，并且在特定实施例中，漏极，源极和沟道区域可以包括相同的导电类型。

公开(公告)号：US10090380B2

公开(公告)日：2018-10-02

申请号：US15009380

申请日：2016-01-28

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Peter Moens ,  Ana Villamor ,  Piet Vanmeerbeek ,  Jaume Roig-Guitart ,  Filip Bogman

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/36 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/739 ,  H01L21/76

摘要： In one embodiment, a semiconductor substrate is provided having a localized superjunction structure extending from a major surface. A doped region is then formed adjacent the localized superjunction structure to create a charge imbalance therein. In one embodiment, the doped region can be an ion implanted region formed within the localized superjunction structure. In another embodiment, the doped region can be an epitaxial layer having a graded dopant profile adjoining the localized superjunction structure. The charge imbalance can improve, among other things, unclamped inductive switching (UIS) performance.

公开(公告)号：US20160308045A1

公开(公告)日：2016-10-20

申请号：US14690703

申请日：2015-04-20

申请人： Semiconductor Components Industries, LLC

发明人： Peter Moens ,  Piet Vanmeerbeek ,  John Michael Parsey, JR.

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/20

CPC分类号： H01L29/7827 ,  H01L21/28264 ,  H01L29/0603 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/66522 ,  H01L29/66666

摘要： An electronic device can include a vertical III-V transistor having a gate electrode and a channel region within a homostructure. The channel region can be disposed between a first portion and a second portion of the gate electrode. In an embodiment, the III-V transistor can be an enhancement-mode GaN transistor, and in a particular embodiment, the drain, source, and channel regions can include the same conductivity type.

摘要翻译： 电子器件可以包括具有栅电极和同构结构内的沟道区的垂直III-V晶体管。 沟道区可以设置在栅电极的第一部分和第二部分之间。 在一个实施例中，III-V晶体管可以是增强型GaN晶体管，并且在特定实施例中，漏极，源极和沟道区域可以包括相同的导电类型。

公开(公告)号：US09287371B2

公开(公告)日：2016-03-15

申请号：US14032454

申请日：2013-09-20

申请人： Semiconductor Components Industries, LLC

发明人： Peter Moens ,  Ana Villamor ,  Piet Vanmeerbeek ,  Jaume Roig-Guitart ,  Filip Bogman

IPC分类号： H01L21/02 ,  H01L29/36 ,  H01L21/265 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC分类号： H01L29/0634 ,  H01L21/265 ,  H01L21/26586 ,  H01L21/76 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813

摘要： In one embodiment, a semiconductor substrate is provided having a localized superjunction structure extending from a major surface. A doped region is then formed adjacent the localized superjunction structure to create a charge imbalance therein. In one embodiment, the doped region can be an ion implanted region formed within the localized superjunction structure. In another embodiment, the doped region can be an epitaxial layer having a graded dopant profile adjoining the localized superjunction structure. The charge imbalance can improve, among other things, unclamped inductive switching (UIS) performance.

摘要翻译： 在一个实施例中，提供了具有从主表面延伸的局部超连接结构的半导体衬底。 然后在局部超结结构附近形成掺杂区，以在其中产生电荷不平衡。 在一个实施例中，掺杂区域可以是形成在局部超结结构内的离子注入区域。 在另一个实施例中，掺杂区域可以是具有与局部超结构结构相邻的分级掺杂剂分布的外延层。 电荷不平衡可以改善，尤其是松开感应开关（UIS）性能。

公开(公告)号：US20210066285A1

公开(公告)日：2021-03-04

申请号：US16671391

申请日：2019-11-01

申请人： Semiconductor Components Industries, LLC

发明人： Jaume Roig-Guitart ,  Herbert De Vleeschouwer ,  Pierre Gassot ,  Piet Vanmeerbeek ,  Frederick Johan G. Declercq ,  Aarnout Wieers ,  Woochul Jeon

IPC分类号： H01L27/02 ,  H01L29/778

摘要： An electronic device can include a source terminal, a gate terminal, and a protection circuit. The protection circuit can include a gate section including a first electrode and a second electrode, wherein the first electrode of the gate section is coupled to the gate terminal; and a source section including a first electrode and a second electrode, wherein the first electrode of the source section is coupled to the source terminal. The protection switch can include a control electrode, a first current-carrying electrode coupled to the gate terminal, and a second current-carrying electrode coupled to the source terminal. The second electrode of the gate section, the second electrode of the source section, and the control electrode of the protection switch can be coupled to one another. In an embodiment, the electronic device can further include an electronic component that is protected by the protection circuit.

公开(公告)号：US10937781B1

公开(公告)日：2021-03-02

申请号：US16671391

申请日：2019-11-01

申请人： Semiconductor Components Industries, LLC

发明人： Jaume Roig-Guitart ,  Herbert De Vleeschouwer ,  Pierre Gassot ,  Piet Vanmeerbeek ,  Frederick Johan G Declercq ,  Aarnout Wieers ,  Woochul Jeon

IPC分类号： H01L27/02 ,  H01L29/778

摘要： An electronic device can include a source terminal, a gate terminal, and a protection circuit. The protection circuit can include a gate section including a first electrode and a second electrode, wherein the first electrode of the gate section is coupled to the gate terminal; and a source section including a first electrode and a second electrode, wherein the first electrode of the source section is coupled to the source terminal. The protection switch can include a control electrode, a first current-carrying electrode coupled to the gate terminal, and a second current-carrying electrode coupled to the source terminal. The second electrode of the gate section, the second electrode of the source section, and the control electrode of the protection switch can be coupled to one another. In an embodiment, the electronic device can further include an electronic component that is protected by the protection circuit.

公开(公告)号：US10680094B2

公开(公告)日：2020-06-09

申请号：US16052041

申请日：2018-08-01

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Abhishek Banerjee ,  Piet Vanmeerbeek ,  Peter Moens

IPC分类号： H01L29/15 ,  H01L31/0256 ,  H01L29/778 ,  H01L29/205 ,  H01L29/51 ,  H01L29/49 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L29/36 ,  H01L29/10 ,  H01L21/306 ,  H01L21/28 ,  H01L29/20 ,  H01L23/31 ,  H01L23/29

摘要： An electronic device can include a channel layer including AlzGa(1-z)N, where 0≤z≤0.1; a gate dielectric layer; and a gate electrode of a high electron mobility transistor (HEMT). The gate dielectric layer can be disposed between the channel layer and the gate electrode. The gate electrode includes a gate electrode film that contacts the gate dielectric layer, wherein the gate electrode film can include a material, wherein the material has a sum of an electron affinity and a bandgap energy of at least 6 eV. In some embodiments, the material can include a p-type semiconductor material. The particular material for the gate electrode film can be selected to achieve a desired threshold voltage for an enhancement-mode HEMT. In another embodiment, a portion of the barrier layer can be left intact under the gate structure. Such a configuration can improve carrier mobility and reduce Rdson.

公开(公告)号：US10811527B2

公开(公告)日：2020-10-20

申请号：US16123115

申请日：2018-09-06

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Peter Moens ,  Abhishek Banerjee ,  Piet Vanmeerbeek

IPC分类号： H01L29/778 ,  H01L29/423 ,  H01L29/417 ,  H01L27/07 ,  H01L29/47 ,  H01L29/66 ,  H01L29/06 ,  H01L29/872

摘要： An electronic device can include a drain electrode of a high electron mobility transistor overlying a channel layer; a source electrode overlying the channel layer, wherein a lowermost portion of the source electrode overlies at least a portion of the channel layer; and a gate electrode of the high electron mobility transistor overlying the channel layer; and a current limiting control structure that controls current passing between the drain and source electrodes. The current limiting control structure can be disposed between the source and gate electrodes, the current limiting control structure can be coupled to the source electrode and the first high electron mobility transistor, and the current limiting control structure has a threshold voltage. The current limiting control structure can be a Schottky-gated HEMT or a MISHEMT.

公开(公告)号：US10797152B2

公开(公告)日：2020-10-06

申请号：US15997122

申请日：2018-06-04

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Abhishek Banerjee ,  Piet Vanmeerbeek ,  Peter Moens ,  Marnix Tack

IPC分类号： H01L29/66 ,  H01L29/20 ,  H01L21/28 ,  H01L29/423 ,  H01L29/778 ,  H01L29/205

摘要： An electronic device can include a channel layer; an access region having an aluminum content substantially uniform or increasing with distance from the channel layer; and a gate dielectric layer overlying and contacting the channel layer. A process of forming an electronic device can include providing a substrate and a channel layer of a III-V semiconductor material over the substrate; forming a masking feature over the channel layer; and forming an access region over the channel layer. In an embodiment, the channel layer can include GaN, and the access region has an aluminum content that is substantially uniform or increases with distance from the channel layer. In another embodiment, the process can include removing at least a portion the masking feature and forming a gate dielectric layer over the channel layer. A dielectric film of the masking feature or the gate dielectric layer contacts the channel layer.

公开(公告)号：US09219138B2

公开(公告)日：2015-12-22

申请号：US14025587

申请日：2013-09-12

申请人： Semiconductor Components Industries, LLC

发明人： Jaume Roig-Guitart ,  Peter Moens ,  Piet Vanmeerbeek

IPC分类号： H01L29/732 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/417 ,  H01L29/10

CPC分类号： H01L29/7802 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0873 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66477 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/78 ,  H01L29/7813 ,  H01L29/7827

摘要： In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region.

摘要翻译： 在一个实施例中，半导体器件具有邻接低掺杂n型区域形成的超结构结构。 在低掺杂n型区域之上形成邻接超结构结构的低掺杂p型区域，并且被配置为改善Eas特性。 在低掺杂p型区域附近形成体区，并且在身体区域附近形成控制电极结构，以控制体区内的通道区域。