公开(公告)号：US20170271519A1

公开(公告)日：2017-09-21

申请号：US15605211

申请日：2017-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Hitomi SATO ,  Kosei NODA ,  Yuta ENDO ,  Mizuho IKARASHI ,  Keitaro IMAI ,  Atsuo ISOBE ,  Yutaka OKAZAKI

IPC: H01L29/786 ,  H01L29/66

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US20140167041A1

公开(公告)日：2014-06-19

申请号：US14187830

申请日：2014-02-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1207 ,  H01L27/1225

Abstract: An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

Abstract translation: 本发明的目的是提供一种具有新结构的半导体器件。 公开了一种半导体器件，包括：第一晶体管，其在包含半导体材料的衬底上包括沟道形成区域，形成有沟道形成区域的杂质区域，沟道形成区域上的第一栅极绝缘层， 所述第一栅极绝缘层以及与所述杂质区电连接的第一源电极和第一漏电极; 以及第二晶体管，其在包含半导体材料的衬底上方包括第二栅极电极，在第二栅极电极上方的第二栅极绝缘层，在第二栅极绝缘层上方的氧化物半导体层，以及第二源极电极和第二漏极电极 其电连接到氧化物半导体层。

公开(公告)号：US20230387318A1

公开(公告)日：2023-11-30

申请号：US18233456

申请日：2023-08-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC: H01L29/786 ,  H01L27/06 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/0688 ,  H01L27/1225 ,  H01L27/1207 ,  H01L21/84

Abstract: An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

公开(公告)号：US20140080238A1

公开(公告)日：2014-03-20

申请号：US14080822

申请日：2013-11-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Shinji MAEKAWA ,  Makoto FURUNO ,  Osamu NAKAMURA ,  Keitaro IMAI

IPC: H01L33/08

CPC classification number: H01L33/08 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/66765 ,  H01L2924/0002 ,  Y10T428/24421 ,  H01L2924/00

Abstract: At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

Abstract translation: 通过能够选择性地形成图案以制造液晶的方法形成至少一个或多个形成布线或电极的导电层和制造用于形成预定图案的掩模等显示面板所需的图案 显示设备。 使用能够通过根据特定目的选择性地排出组合物的液滴来形成预定图案的液滴喷射方法作为能够在形成导电层，绝缘层等中选择性地形成图案的方法。

公开(公告)号：US20230369510A1

公开(公告)日：2023-11-16

申请号：US18225840

申请日：2023-07-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/06 ,  H01L21/84

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/0688 ,  H01L27/1207 ,  H01L21/84

Abstract: An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

公开(公告)号：US20180047730A1

公开(公告)日：2018-02-15

申请号：US15728797

申请日：2017-10-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

IPC: H01L27/108 ,  G11C11/405 ,  G11C16/02 ,  H01L21/8258 ,  H01L27/06 ,  G11C11/404 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/12 ,  H01L29/786 ,  H01L27/088

CPC classification number: H01L27/10802 ,  G11C11/404 ,  G11C11/405 ,  G11C16/02 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869

Abstract: The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10−13 A or less.

公开(公告)号：US20210305432A1

公开(公告)日：2021-09-30

申请号：US17345546

申请日：2021-06-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keitaro IMAI

IPC: H01L29/786 ,  H01L27/06 ,  H01L27/12

Abstract: An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.

公开(公告)号：US20160079245A1

公开(公告)日：2016-03-17

申请号：US14950624

申请日：2015-11-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Keitaro IMAI ,  Jun KOYAMA

IPC: H01L27/108 ,  H01L29/786

CPC classification number: H01L27/10802 ,  G11C11/404 ,  G11C11/405 ,  G11C16/02 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/1156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869

Abstract: The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10−13 A or less.

Abstract translation: 半导体器件包括：具有氧化物半导体层的晶体管; 以及使用除了氧化物半导体之外的半导体材料形成的逻辑电路。 晶体管的源电极和漏电极中的一个电连接到逻辑电路的至少一个输入端，并且至少一个输入信号通过晶体管施加到逻辑电路。 晶体管的截止电流优选为1×10-13A以下。

公开(公告)号：US20150137154A1

公开(公告)日：2015-05-21

申请号：US14608802

申请日：2015-01-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Keitaro IMAI ,  Aya ANZAI ,  Yasuko WATANABE

IPC: H01L27/32 ,  H01L51/52

CPC classification number: H01L27/3276 ,  H01L23/564 ,  H01L27/1222 ,  H01L27/3258 ,  H01L51/0005 ,  H01L51/5246 ,  H01L2924/0002 ,  H01L2924/00

Abstract: It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided.

Abstract translation: 本发明的目的是提供一种防止水和/或氧的外部侵入并防止由于这些侵入物质引起的发光元件劣化的显示装置，并且提供一种制造方法，其包括用于制造显示器的简单制造步骤 设备。 本发明提供了一种在暴露的层间绝缘体的边缘上具有密封材料的显示装置，用于防止来自层间绝缘体的水和/或氧的侵入。 此外，本发明提供一种在暴露的层间绝缘体上具有阻挡体的显示装置，用于防止水和/或氧从层间绝缘体的侵入。 此外，在生产显示装置的制造步骤中应用液滴放电技术可以消除诸如曝光和显影的光刻步骤。 因此，提供了一种生产具有提高的产量的显示装置的方法。

公开(公告)号：US20140239297A1

公开(公告)日：2014-08-28

申请号：US14269819

申请日：2014-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari SASAKI ,  Hitomi SATO ,  Kosei NODA ,  Yuta ENDO ,  Mizuho IKARASHI ,  Keitaro IMAI ,  Atsuo ISOBE ,  Yutaka OKAZAKI

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

Abstract translation: 本发明的目的是制造其中包括氧化物半导体的晶体管具有常态特性，电特性波动小，可靠性高的半导体器件。 首先，在基板上进行第一热处理，在基板上形成基极绝缘层，在基底绝缘层上形成氧化物半导体层，对形成氧化物半导体的工序进行第一热处理的工序 在不暴露于空气的情况下执行层。 接下来，在形成氧化物半导体层之后，进行第二热处理。 使用通过加热而释放氧的绝缘层作为基底绝缘层。