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    Memory device and memory unit
    1.
    发明授权
    Memory device and memory unit 有权

    公开(公告)号：US10418416B2

    公开(公告)日：2019-09-17

    申请号：US14653828

    申请日：2013-12-10

    Applicant: SONY CORPORATION

    Inventor： Hiroaki Sei ,  Kazuhiro Ohba ,  Seiji Nonoguchi

    IPC: H01L27/24 ,  H01L45/00

    Abstract: There are provided a memory device and a memory unit that make it possible to improve retention property of a resistance value in low-current writing. The memory device of the technology includes a first electrode, a memory layer, and a second electrode in order, in which the memory layer includes an ion source layer containing one or more transition metal elements selected from group 4, group 5, and group 6 in periodic table, one or more chalcogen elements selected from tellurium (Te), sulfur (S), and selenium (Se), and one or both of boron (B) and carbon (C), and a resistance change layer having resistance that is varied by voltage application to the first electrode and the second electrode.

    Memory element with ion conductor layer in which metal ions diffuse and memory device incorporating same
    5.
    发明授权
    Memory element with ion conductor layer in which metal ions diffuse and memory device incorporating same 有权
    具有离子导体层的记忆元件，其中金属离子扩散并且存储器件并入其中

    公开(公告)号：US09577187B2

    公开(公告)日：2017-02-21

    申请号：US14808008

    申请日：2015-07-24

    Applicant: Sony Corporation

    Inventor： Akihiro Maesaka ,  Kazuhiro Ohba ,  Tetsuya Mizuguchi ,  Koji Miyata ,  Motonari Honda ,  Katsuhisa Aratani

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/085 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608

    Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.

    Abstract translation: 本发明提供了一种存储元件和存储器件，其实现了多个存储元件的初始状态或擦除状态下的电阻值的变化，并且能够将电阻值保持在写入/擦除状态以用于写入/擦除操作 多次。 存储元件按顺序包括第一电极，存储层和第二电极。 存储层具有：包含碲（Te），硫（S）和硒（Se）的至少一种硫属元素的离子源层和至少一种选自铜（Cu），银（Ag）， 锌（Zn）和锆（Zr）; 以及具有比离子源层的电阻值高的电阻值并且具有不同组成的两个或更多个高电阻层。

    MEMORY ELEMENT WITH ION CONDUCTOR LAYER IN WHICH METAL IONS DIFFUSE AND MEMORY DEVICE INCORPORATING SAME
    8.
    发明申请
    MEMORY ELEMENT WITH ION CONDUCTOR LAYER IN WHICH METAL IONS DIFFUSE AND MEMORY DEVICE INCORPORATING SAME 有权
    具有离子导体层的记忆元件，其中金属离子和存储器件并入其中

    公开(公告)号：US20150333256A1

    公开(公告)日：2015-11-19

    申请号：US14808008

    申请日：2015-07-24

    Applicant: Sony Corporation

    Inventor： Akihiro Maesaka ,  Kazuhiro Ohba ,  Tetsuya Mizuguchi ,  Koji Miyata ,  Motonari Honda ,  Katsuhisa Aratani

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/085 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608

    Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.

    Abstract translation: 本发明提供了一种存储元件和存储器件，其实现了多个存储元件的初始状态或擦除状态下的电阻值的变化，并且能够将电阻值保持在写入/擦除状态以用于写入/擦除操作 多次。 存储元件按顺序包括第一电极，存储层和第二电极。 存储层具有：包含碲（Te），硫（S）和硒（Se）的至少一种硫属元素的离子源层和至少一种选自铜（Cu），银（Ag）， 锌（Zn）和锆（Zr）; 以及具有比离子源层的电阻值高的电阻值并且具有不同组成的两个或更多个高电阻层。

    Selective device, memory cell, and storage unit
    10.
    发明授权
    Selective device, memory cell, and storage unit 有权

    公开(公告)号：US10971685B2

    公开(公告)日：2021-04-06

    申请号：US15545923

    申请日：2016-01-08

    Applicant: SONY CORPORATION

    Inventor： Kazuhiro Ohba ,  Minoru Ikarashi

    IPC: H01L45/00 ,  H01L27/105 ,  H01L27/24 ,  H01L49/02 ,  H01L27/22

    Abstract: A selective device includes a first electrode, a second electrode, a switch device, and a non-linear resistive device. The second electrode is disposed to face the first electrode. The switch device is provided between the first electrode and the second electrode. The non-linear resistive device contains one or more of boron (B), silicon (Si), and carbon (C). The non-linear resistive device is coupled to the switch device in series.

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