公开(公告)号：US20190244926A1

公开(公告)日：2019-08-08

申请号：US16388113

申请日：2019-04-18

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Richard S. Graf ,  Jay F. Leonard ,  David J. West ,  Charles H. Wilson

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/562 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11332 ,  H01L2224/11442 ,  H01L2224/11505 ,  H01L2224/11552 ,  H01L2224/1181 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/14135 ,  H01L2224/14155 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17104 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81986 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2924/20645 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00012

摘要： Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.

公开(公告)号：US20160365329A1

公开(公告)日：2016-12-15

申请号：US15083852

申请日：2016-03-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Richard S. GRAF ,  Jay F. LEONARD ,  David J. WEST ,  Charles H. WILSON

IPC分类号： H01L23/00 ,  H01L23/04 ,  H01L23/31

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/562 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11332 ,  H01L2224/11442 ,  H01L2224/11505 ,  H01L2224/11552 ,  H01L2224/1181 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/14135 ,  H01L2224/14155 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17104 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81986 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2924/20645 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00012

摘要： Sintered connection structures and methods of manufacture are disclosed. The method includes placing a powder on a substrate and sintering the powder to form a plurality of pillars. The method further includes repeating the placing and sintering steps until the plurality of pillars reach a predetermined height. The method further includes forming a solder cap on the plurality of pillars. The method further includes joining the substrate to a board using the solder cap.

摘要翻译： 公开了烧结连接结构和制造方法。 该方法包括将粉末放置在基底上并烧结粉末以形成多个支柱。 该方法还包括重复放置和烧结步骤，直到多个柱达到预定高度。 该方法还包括在多个柱上形成焊锡帽。 该方法还包括使用焊料盖将基板连接到板上。

公开(公告)号：US20160315059A1

公开(公告)日：2016-10-27

申请号：US14980616

申请日：2015-12-28

申请人： STMICROELECTRONICS S.R.L.

发明人： Paolo CREMA ,  Pierangelo MAGNI

IPC分类号： H01L23/00 ,  B29C67/00 ,  G05B19/418

CPC分类号： H01L24/13 ,  B33Y80/00 ,  G05B19/418 ,  G05B2219/35134 ,  G05B2219/49007 ,  H01L22/32 ,  H01L24/11 ,  H01L2224/11312 ,  H01L2224/11318 ,  H01L2224/1143 ,  H01L2224/11505 ,  H01L2224/11552 ,  H01L2224/1183 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An electronic component, such as an integrated circuit, includes one or more circuits with bumps extending in a longitudinal direction outward from the circuit. The bumps may be formed, e.g., by 3D printing, with at least one protrusion extending away from the longitudinal direction.

摘要翻译： 诸如集成电路的电子部件包括具有从电路向外延伸的凸起的一个或多个电路。 凸起可以例如通过3D印刷形成，其中至少一个突起远离纵向方向延伸。

公开(公告)号：US08962471B2

公开(公告)日：2015-02-24

申请号：US13912826

申请日：2013-06-07

申请人： Toshinori Ogashiwa ,  Masayuki Miyairi

发明人： Toshinori Ogashiwa ,  Masayuki Miyairi

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L23/00

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/13 ,  H01L24/17 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11332 ,  H01L2224/11416 ,  H01L2224/11442 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11505 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13017 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/75251 ,  H01L2224/75343 ,  H01L2224/81097 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81207 ,  H01L2224/8121 ,  H01L2224/81444 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01103 ,  H01L2924/01108 ,  H01L2924/01203 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/381 ,  H01L2924/384 ,  H01L2924/20103 ,  H01L2924/20107 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A two-layer structure bump including a first bump layer of a bulk body of a first conductive metal, which is any of gold, copper, and nickel, formed on a substrate and a second bump layer of a sintered body of a powder of a second conductive metal, which is any of gold and silver, formed on the first bump layer. The bulk body composing the first bump layer is formed through any of plating, sputtering, or CVD. The sintered body composing the second bump layer is formed by sintering the powder of the second conductive metal having a purity of not lower than 99.9 wt % and an average particle diameter of 0.005 μm to 1.0 μm. The second bump layer has a Young's modulus 0.1 to 0.4 times that of the first bump layer.

摘要翻译： 一种双层结构凸块，其包括形成在基板上的第一导电金属的本体的第一凸起层，其为金，铜和镍中的任一个，所述第一凸起层形成在基板上的粉末的烧结体的第二凸起层 第二导电金属，其是形成在第一凸块层上的任何金和银。 通过电镀，溅射或CVD中的任何一种形成构成第一凸块层的体本体。 构成第二凸点层的烧结体通过烧结纯度为99.9重量％以上且平均粒径为0.005μm〜1.0μm的第二导电性金属的粉末而形成。 第二凸点层的杨氏模量为第一凸点层的杨氏模量的0.1〜0.4倍。

公开(公告)号：US20110003470A1

公开(公告)日：2011-01-06

申请号：US12828003

申请日：2010-06-30

申请人： Guy F. Burgess ,  Anthony Curtis ,  Michael E. Johnson ,  Gene Stout ,  Theodore G. Tessier

发明人： Guy F. Burgess ,  Anthony Curtis ,  Michael E. Johnson ,  Gene Stout ,  Theodore G. Tessier

IPC分类号： H01L21/768

CPC分类号： H01L24/11 ,  H01L21/563 ,  H01L24/03 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11505 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/11903 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13101 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13117 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8184 ,  H01L2224/831 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/381 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01048 ,  H01L2924/01032 ,  H01L2924/00014 ,  H01L2924/00012

摘要： In wafer-level chip-scale packaging and flip-chip packaging and assemblies, a solder cap is formed on a vertical pillar. In one embodiment, the vertical pillar overlies a semiconductor substrate. A solder paste, which may be doped with at least one trace element, is applied on a top surface of the pillar structure. A reflow process is performed after applying the solder paste to provide the solder cap.

摘要翻译： 在晶圆级芯片级封装和倒装芯片封装和组装中，在垂直支柱上形成焊锡帽。 在一个实施例中，垂直柱覆盖半导体衬底。 可以在柱结构的顶表面上施加可以掺杂有至少一个微量元素的焊膏。 在施加焊膏以提供焊料盖之后进行回流工艺。

公开(公告)号：US07816780B2

公开(公告)日：2010-10-19

申请号：US12002677

申请日：2007-12-17

申请人： Ryoichi Kajiwara ,  Kazutoshi Ito

发明人： Ryoichi Kajiwara ,  Kazutoshi Ito

IPC分类号： H01L23/48 ,  H01L23/58 ,  H05K3/46

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/84 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/0603 ,  H01L2224/11505 ,  H01L2224/13144 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/1379 ,  H01L2224/138 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/351 ,  Y10T428/24322 ,  Y10T428/25 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A technique capable of improving reliability of a semiconductor apparatus is provided. A semiconductor device having a metal electrode on at least one principal surface and a die pad (a metal member) electrically connected to the metal electrode via conductive resin composed of base resin (an organic binder) mixed with a Ag particle (metal powder) including precious metal are provided, and a configuration is made so that a porous nano-particle coat film (a precious metal layer) having an Ag (precious metal) nano particle fired on a metal surface is formed on at least one of mutually opposed surfaces of the metal electrode and the die pad.

摘要翻译： 提供了能够提高半导体装置的可靠性的技术。 一种具有至少一个主表面上的金属电极的半导体器件和通过与由Ag颗粒（金属粉末）混合的基础树脂（有机粘合剂）组成的导电树脂与金属电极电连接的管芯焊盘（金属部件） 提供贵金属，并且在金属表面上烧结Ag（贵金属）纳米颗粒的多孔纳米颗粒涂层（贵金属层）形成在至少一个相互相对的表面上 金属电极和管芯焊盘。

公开(公告)号：US07678255B2

公开(公告)日：2010-03-16

申请号：US11419128

申请日：2006-05-18

申请人： Oscar Khaselev ,  Brian G. Lewis ,  Michael Marczi ,  Bawa Singh

发明人： Oscar Khaselev ,  Brian G. Lewis ,  Michael Marczi ,  Bawa Singh

IPC分类号： C25D13/12 ,  G03G13/32

CPC分类号： C25D13/00 ,  B23K3/0623 ,  B23K2101/42 ,  C25D5/022 ,  C25D13/22 ,  C25D15/00 ,  H01L21/2885 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05568 ,  H01L2224/11505 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/3025 ,  H05K3/3484 ,  H05K2203/0425 ,  H05K2203/0557 ,  H05K2203/0776 ,  H05K2203/09 ,  H05K2203/105 ,  H01L2224/05599

摘要： A mask for application to a substrate to facilitate electrokinetic deposition of charged particles onto the substrate, the mask comprising a conducting layer, a dielectric layer, and mask openings. A method for applying a pattern of charged particles to a substrate comprising applying the foregoing the substrate to yield a masked substrate; immersing the masked substrate in a bath containing the charged particles; and establishing an electrical potential between the conducting layer of the mask and a counter-electrode thereby electrokinetically depositing the particles through the mask openings onto areas of the substrate exposed in the mask openings. Products made by this method.

摘要翻译： 一种用于施加到基底以便于将带电粒子电动沉积到基底上的掩模，该掩模包括导电层，电介质层和掩模开口。 一种将带电粒子的图案应用于基板的方法，包括将上述基板施加到掩模基板上; 将掩蔽的基板浸入含有带电粒子的浴中; 并且在掩模的导电层和对电极之间建立电位，从而通过掩模开口电动地将颗粒沉积到暴露在掩模开口中的基板的区域上。 通过这种方法制成的产品。

公开(公告)号：US20080145607A1

公开(公告)日：2008-06-19

申请号：US12002677

申请日：2007-12-17

申请人： Ryoichi Kajiwara ,  Kazutoshi Ito

发明人： Ryoichi Kajiwara ,  Kazutoshi Ito

IPC分类号： B32B3/10 ,  B32B5/16 ,  H01L21/44

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/84 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/0603 ,  H01L2224/11505 ,  H01L2224/13144 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/1379 ,  H01L2224/138 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01016 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/351 ,  Y10T428/24322 ,  Y10T428/25 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A technique capable of improving reliability of a semiconductor apparatus is provided. A semiconductor device having a metal electrode on at least one principal surface and a die pad (a metal member) electrically connected to the metal electrode via conductive resin composed of base resin (an organic binder) mixed with a Ag particle (metal powder) including precious metal are provided, and a configuration is made so that a porous nano-particle coat film (a precious metal layer) having an Ag (precious metal) nano particle fired on a metal surface is formed on at least one of mutually opposed surfaces of the metal electrode and the die pad.

摘要翻译： 提供了能够提高半导体装置的可靠性的技术。 一种具有至少一个主表面上的金属电极的半导体器件和通过与由Ag颗粒（金属粉末）混合的基础树脂（有机粘合剂）组成的导电树脂与金属电极电连接的管芯焊盘（金属部件） 提供贵金属，并且在金属表面上烧结Ag（贵金属）纳米颗粒的多孔纳米颗粒涂层（贵金属层）形成在至少一个相互相对的表面上 金属电极和管芯焊盘。

公开(公告)号：US20080000080A1

公开(公告)日：2008-01-03

申请号：US11856084

申请日：2007-09-17

申请人： William Bernier ,  David Eichstadt ,  Mukta Farooq ,  John Knickerbocker

发明人： William Bernier ,  David Eichstadt ,  Mukta Farooq ,  John Knickerbocker

IPC分类号： H05K3/00

CPC分类号： H01L24/13 ,  G01R1/06716 ,  G01R1/07314 ,  G01R3/00 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/81 ,  H01L2221/68377 ,  H01L2224/11003 ,  H01L2224/114 ,  H01L2224/11505 ,  H01L2224/116 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1318 ,  H01L2224/13184 ,  H01L2224/81205 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/8384 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K3/06 ,  H05K3/3436 ,  H05K2201/10242 ,  Y02P70/613 ,  Y10T29/49124 ,  Y10T29/49204 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of forming compliant electrical contacts includes patterning a conductive layer into an array of compliant members. The array of compliant members is then positioned to be in contact with electrical connection pads on an integrated circuit wafer and the compliant members are joined to the pads. Then, the supporting layer that supported the compliant members is removed to leave the compliant members connected to the pads.

摘要翻译： 形成顺应性电触头的方法包括将导电层图案化为顺应构件阵列。 然后将顺应构件阵列定位成与集成电路晶片上的电连接焊盘接触，并且柔性构件连接到焊盘。 然后，移除支撑柔顺构件的支撑层，以使与柔性构件连接的衬垫离开。

公开(公告)号：US20070048901A1

公开(公告)日：2007-03-01

申请号：US11213847

申请日：2005-08-30

申请人： Lu-Chen Hwan

发明人： Lu-Chen Hwan

IPC分类号： H01L21/00

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/11505 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/274 ,  H01L2224/2784 ,  H01L2224/83801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A wafer-level package and an IC module assembly method for a wafer-level package are provided in the present invention. The method comprises forming a metal bump on a wafer, applying a high polymer resin coating to the wafer, grinding a surface of the resin coating, printing an endpoint on the wafer, a grinding and cutting step and bonding the chips to an antenna or substrate with SMT. The present invention can be used to manufacture high quality chips of low cost with mass production to significantly reduce cost and maintain high quality of the products.