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公开(公告)号:US20230061430A1
公开(公告)日:2023-03-02
申请号:US17896692
申请日:2022-08-26
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Paolo FERRARI , Lorenzo CORSO , Flavio Francesco VILLA , Silvia NICOLI , Luca LAMAGNA
Abstract: Method for manufacturing a micro-electro-mechanical system, MEMS, integrating a first MEMS device and a second MEMS device. The first MEMS device is a capacitive pressure sensor and the second MEMS device is an inertial sensor. The steps of manufacturing the first and second MEMS devices are, at least partly, shared with each other, resulting in a high degree of integration on a single die, and allowing to implement a manufacturing process with high yield and controlled costs.
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公开(公告)号:US20220169498A1
公开(公告)日:2022-06-02
申请号:US17534286
申请日:2021-11-23
Inventor: Enri DUQI , Lorenzo BALDO , Paolo FERRARI , Benedetto Vigna , Flavio Francesco VILLA , Laura Maria CASTOLDI , Ilaria GELMI
IPC: B81B7/00
Abstract: A semiconductor device includes: a substrate; a transduction microstructure integrated in the substrate; a cap joined to the substrate and having a first face adjacent to the substrate and a second, outer, face; and a channel extending through the cap from the second face to the first face and communicating with the transduction microstructure. A protective membrane made of porous polycrystalline silicon permeable to aeriform substances is set across the channel.
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3.
公开(公告)号:US20190221678A1
公开(公告)日:2019-07-18
申请号:US16246945
申请日:2019-01-14
Applicant: STMicroelectronics S.r.l.
Inventor: Flavio Francesco VILLA , Marco MORELLI , Marco MARCHESI , Simone Dario MARIANI , Fabrizio Fausto Renzo TOIA
CPC classification number: H01L29/945 , H01L21/02639 , H01L21/0265 , H01L27/0629 , H01L28/60 , H01L29/66181
Abstract: A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.
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公开(公告)号:US20170253477A1
公开(公告)日:2017-09-07
申请号:US15602760
申请日:2017-05-23
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Lorenzo BALDO , Enri DUQI , Flavio Francesco VILLA
CPC classification number: B81B7/0045 , B81B3/0072 , B81B2201/0228 , B81B2201/025 , B81B2203/0127 , B81B2203/0163 , B81B2203/0315 , B81B2207/012 , B81C1/00182 , B81C1/00325 , B81C2201/0116 , B81C2201/0173 , B81C2203/0785 , G02B26/0858
Abstract: A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.
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5.
公开(公告)号:US20230301191A1
公开(公告)日:2023-09-21
申请号:US18323262
申请日:2023-05-24
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Paolo FERRARI , Flavio Francesco VILLA , Lucia ZULLINO , Andrea NOMELLINI , Luca SEGHIZZI , Luca ZANOTTI , Bruno MURARI , Martina SCOLARI
IPC: H10N10/855 , H10N10/01 , H10N10/17
CPC classification number: H10N10/855 , H10N10/01 , H10N10/17
Abstract: A method of fabricating a thermoelectric converter that includes providing a layer of a Silicon-based material having a first surface and a second surface, opposite to and separated from the first surface by a Silicon-based material layer thickness; forming a plurality of first thermoelectrically active elements of a first thermoelectric semiconductor material having a first Seebeck coefficient, and forming a plurality of second thermoelectrically active elements of a second thermoelectric semiconductor material having a second Seebeck coefficient, wherein the first and second thermoelectrically active elements are formed to extend through the Silicon-based material layer thickness, from the first surface to the second surface; forming electrically conductive interconnections in correspondence of the first surface and of the second surface of the layer of Silicon-based material, for electrically interconnecting the plurality of first thermoelectrically active elements and the plurality of second thermoelectrically active elements, and forming an input electrical terminal and an output electrical terminal electrically connected to the electrically conductive interconnections, wherein the first thermoelectric semiconductor material and the second thermoelectric semiconductor material comprise Silicon-based materials selected among porous Silicon or polycrystalline SiGe or polycrystalline Silicon.
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公开(公告)号:US20190115524A1
公开(公告)日:2019-04-18
申请号:US16215821
申请日:2018-12-11
Applicant: STMicroelectronics S.r.l.
Inventor: Maria Fortuna BEVILACQUA , Flavio Francesco VILLA , Rossana SCALDAFERRI , Valeria CASUSCELLI , Andrea DI MATTEO , Dino FARALLI
IPC: H01L41/113 , H02N2/18 , H01L41/22 , H01L41/047 , H01L41/053 , H01L41/29 , H01L41/25 , H01L41/187 , H01L41/332
Abstract: A MEMS piezoelectric device includes a monolithic semiconductor body having first and second main surfaces extending parallel to a horizontal plane formed by first and second horizontal axes. A housing cavity is arranged within the monolithic semiconductor body. A membrane is suspended above the housing cavity at the first main surface. A piezoelectric material layer is arranged above a first surface of the membrane with a proof mass coupled to a second surface, opposite to the first surface, along the vertical axis. An electrode arrangement is provided in contact with the piezoelectric material layer. The proof mass causes deformation of the piezoelectric material layer in response to environmental mechanical vibrations. The proof mass is coupled to the membrane by a connection element arranged, in a central position, between the membrane and the proof mass in the direction of the vertical axis.
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公开(公告)号:US20170247249A1
公开(公告)日:2017-08-31
申请号:US15276613
申请日:2016-09-26
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Enri DUQI , Sebastiano CONTI , Lorenzo BALDO , Flavio Francesco VILLA
CPC classification number: B81B7/0038 , B81B3/0086 , B81B7/0019 , B81B7/0061 , B81B2201/0264 , B81B2203/0127 , B81B2203/0315 , B81B2207/012 , B81C1/00269
Abstract: A micro-electro-mechanical pressure sensor device, formed by a cap region and by a sensor region of semiconductor material. An air gap extends between the sensor region and the cap region; a buried cavity extends underneath the air gap, in the sensor region, and delimits a membrane at the bottom. A through trench extends within the sensor region and laterally delimits a sensitive portion housing the membrane, a supporting portion, and a spring portion, the spring portion connecting the sensitive portion to the supporting portion. A channel extends within the spring portion and connects the buried cavity to a face of the second region. The first air gap is fluidically connected to the outside of the device, and the buried cavity is isolated from the outside via a sealing region arranged between the sensor region and the cap region.
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8.
公开(公告)号:US20230389426A1
公开(公告)日:2023-11-30
申请号:US18318612
申请日:2023-05-16
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo FERRARI , Flavio Francesco VILLA , Marco DEL SARTO
Abstract: MEMS thermoelectric generator comprising: a thermoelectric cell including one or more thermoelectric elements partially extending on a cavity of the thermoelectric cell; a thermoplastic layer extending on the thermoelectric cell and having a top surface and a bottom surface opposite to each other along a first axis, the bottom surface facing the thermoelectric cell and the thermoplastic layer being of thermally insulating material and configured to be processed through laser direct structuring, LDS, technique; a heat sink configured to exchange heat with the thermoelectric cell interposed, along the first axis, between the heat sink and the thermoplastic layer; and a thermal via of metal material, extending through the thermoplastic layer from the top surface to the bottom surface so that it is superimposed, along the first axis, on the cavity, wherein the thermoelectric cell may exchange heat with a thermal source through the thermal via.
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公开(公告)号:US20220411256A1
公开(公告)日:2022-12-29
申请号:US17843483
申请日:2022-06-17
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Paolo FERRARI , Flavio Francesco VILLA , Enri DUQI , Igor VARISCO , Filippo D'ERCOLI
Abstract: MEMS device formed in a semiconductor body which is monolithic and has a first and a second main surface. A buried cavity extends into the semiconductor body below and at a distance from the first main surface. A diaphragm extends between the buried cavity and the first main surface of the semiconductor body and has a buried face facing the buried cavity. A diaphragm insulating layer extends on the buried face of the diaphragm and a lateral insulating region extends into the semiconductor body along a closed line, between the first main surface and the diaphragm insulating layer, above the buried cavity. The lateral insulating region laterally delimits the diaphragm and forms, with the diaphragm insulating layer, a diaphragm insulating region which delimits the diaphragm and electrically insulates it from the rest of the wafer.
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公开(公告)号:US20210359189A1
公开(公告)日:2021-11-18
申请号:US17321252
申请日:2021-05-14
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Paolo FERRARI , Flavio Francesco VILLA , Lucia ZULLINO , Andrea NOMELLINI , Luca SEGHIZZI , Luca ZANOTTI , Bruno MURARI , Martina SCOLARI
Abstract: A method of fabricating a thermoelectric converter that includes providing a layer of a Silicon-based material having a first surface and a second surface, opposite to and separated from the first surface by a Silicon-based material layer thickness; forming a plurality of first thermoelectrically active elements of a first thermoelectric semiconductor material having a first Seebeck coefficient, and forming a plurality of second thermoelectrically active elements of a second thermoelectric semiconductor material having a second Seebeck coefficient, wherein the first and second thermoelectrically active elements are formed to extend through the Silicon-based material layer thickness, from the first surface to the second surface; forming electrically conductive interconnections in correspondence of the first surface and of the second surface of the layer of Silicon-based material, for electrically interconnecting the plurality of first thermoelectrically active elements and the plurality of second thermoelectrically active elements, and forming an input electrical terminal and an output electrical terminal electrically connected to the electrically conductive interconnections, wherein the first thermoelectric semiconductor material and the second thermoelectric semiconductor material comprise Silicon-based materials selected among porous Silicon or polycrystalline SiGe or polycrystalline Silicon.
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