公开(公告)号：US20130309821A1

公开(公告)日：2013-11-21

申请号：US13870053

申请日：2013-04-25

Applicant: Samsung Display Co., Ltd.

Inventor： Hyeong-Suk YOO ,  Ho-Jun LEE ,  Sung-Ryul KIM ,  O-Sung SEO ,  Hong-Kee CHIN

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248

Abstract: A method of manufacturing a thin film transistor array substrate includes forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming first, second, and third passivation films successively on the substrate. Over the above multi-layered passivation film forming a first photoresist pattern including a first portion formed on part of the drain electrode and on the pixel region, and a second portion. The second portion is thicker than the first portion. Then, patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern, and forming a transparent electrode pattern on the second passivation layer.

Abstract translation: 制造薄膜晶体管阵列基板的方法包括在基板上形成栅极图案，在基板上形成栅极绝缘膜，在基板上形成源/漏图案和半导体图案，形成第一，第二和第三钝化层 胶片依次在基材上。 在上述多层钝化膜上形成包括形成在漏电极的一部分上和在像素区域上的第一部分的第一光致抗蚀剂图案和第二部分。 第二部分比第一部分厚。 然后，使用第一光致抗蚀剂图案图案化第三钝化膜，通过去除第一光致抗蚀剂图案的第一部分形成第二光致抗蚀剂图案，在基板上形成透明电极膜，去除设置在第一光致抗蚀剂图案上的第二光致抗蚀剂图案和透明电极膜 第二光致抗蚀剂图案，并且在第二钝化层上形成透明电极图案。

公开(公告)号：US20140175441A1

公开(公告)日：2014-06-26

申请号：US13927781

申请日：2013-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： Hong-Kee CHIN ,  Yun Jong Yeo ,  Sang Gab Kim ,  Jung-Suk Bang ,  Byeong Hoon Cho

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/32139 ,  H01L21/84 ,  H01L27/1218 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1446 ,  H01L31/03765 ,  H01L31/1136 ,  H01L31/204

Abstract: A thin film transistor array panel includes a substrate, an insulation layer, a first semiconductor, and a second semiconductor. The insulation layer is disposed on the substrate and includes a stepped portion. The first semiconductor is disposed on the insulation layer. The second semiconductor is disposed on the insulation layer and includes a semiconductor material different than the first semiconductor. The stepped portion is spaced apart from an edge of the first semiconductor.

Abstract translation: 薄膜晶体管阵列面板包括基板，绝缘层，第一半导体和第二半导体。 绝缘层设置在基板上并且包括台阶部分。 第一半导体设置在绝缘层上。 第二半导体设置在绝缘层上，并且包括与第一半导体不同的半导体材料。 台阶部分与第一半导体的边缘间隔开。

公开(公告)号：US20140147947A1

公开(公告)日：2014-05-29

申请号：US14168971

申请日：2014-01-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yu-Gwang JEONG ,  Young-Wook LEE ,  Sang-Gab KIM ,  Woo-Geun LEE ,  Min-Seok OH ,  Jang-Soo KIM ,  Kap-Soo YOON ,  Shin-Il CHOI ,  Hong-Kee CHIN ,  Seung-Ha CHOI ,  Seung-Hwan SHIM ,  Sung-Hoon YANG ,  Ki-Hun JEONG

IPC: H01L27/12

CPC classification number: H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract translation: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US20130153906A1

公开(公告)日：2013-06-20

申请号：US13668082

申请日：2012-11-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hye-Young RYU ,  Jang-Soo KIM ,  Sang-Gab KIM ,  Hong-Kee CHIN ,  Min-Seok OH ,  Hee-Hwan CHOE ,  Shi-Yul KIM

IPC: G02F1/1362

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/1362 ,  G02F2001/136222 ,  G02F2202/02

Abstract: A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.

Abstract translation: 提供了薄膜晶体管阵列面板，其包括栅极线，与栅极线相交的数据线，与栅极和数据线分开的存储电极，连接到栅极和数据线并具有漏极的薄膜晶体管 连接到漏电极的像素电极，薄膜晶体管上的第一绝缘层，并且设置在像素电极下方;第二绝缘层，设置在第一绝缘层上，并且具有使存储电极上的第一绝缘层露出的开口 。

公开(公告)号：US20130234142A1

公开(公告)日：2013-09-12

申请号：US13872605

申请日：2013-04-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dae-Cheol KIM ,  Sung-Ryul KIM ,  Yung-Jong YEO ,  Hong-Kee CHIN ,  Ki-Hun JEONG

IPC: H01L31/113 ,  H01L31/12

CPC classification number: G02F1/1368 ,  G02F1/13338 ,  G02F2001/13312 ,  H01L31/1136 ,  H01L31/12

Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Abstract translation: 显示装置包括红外感测晶体管和可见感测晶体管。 可见感测晶体管包括在衬底上的半导体; 半导体上的欧姆接触; 在欧姆接触上的蚀刻停止层; 蚀刻停止层上的源电极和漏电极; 源电极和漏电极上的钝化层; 和钝化层上的栅电极。 蚀刻停止层可以由与源电极和漏电极相同的材料构成。 除了不存在蚀刻停止层之外，红外感测晶体管类似于可见感测晶体管。