DISPLAY SUBSTRATE INCLUDING A THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    DISPLAY SUBSTRATE INCLUDING A THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    显示基板包括薄膜晶体管及其制造方法

    公开(公告)号:US20150053970A1

    公开(公告)日:2015-02-26

    申请号:US14454822

    申请日:2014-08-08

    IPC分类号: H01L27/12

    摘要: A display substrate includes a gate electrode on a base substrate, an active pattern which overlaps the gate electrode and includes a metal oxide semiconductor, an insulation pattern on the active pattern, a source electrode which contacts the active pattern, a drain electrode which contacts the active pattern and is spaced apart from the source electrode, and a first passivation layer which covers the active pattern and the insulation pattern, and includes fluorine, where the active pattern includes a first portion which directly contacts the insulation pattern and overlaps the gate electrode and the insulation pattern, a second portion which contacts the first passivation layer and has an electrical conductivity substantially larger than that of the first portion, a third portion which contacts the first passivation layer, has an electrical conductivity substantially larger than that of the first portion and is spaced apart from the second portion.

    摘要翻译: 显示基板包括在基底基板上的栅极电极,与栅电极重叠并且包括金属氧化物半导体的有源图案,有源图案上的绝缘图案,与有源图案接触的源极电极, 并且与源电极间隔开,以及覆盖有源图案和绝缘图案并包括氟的第一钝化层,其中有源图案包括直接接触绝缘图案并与栅电极重叠的第一部分,以及 所述绝缘图案是接触所述第一钝化层并具有比所述第一部分的导电性大的电导率的第二部分,与所述第一钝化层接触的第三部分具有比所述第一部分的电导率大的电导率, 与第二部分间隔开。

    Thin Film Transistor and Method for Manufacturing a Display Panel
    2.
    发明申请
    Thin Film Transistor and Method for Manufacturing a Display Panel 审中-公开
    薄膜晶体管及制造显示面板的方法

    公开(公告)号:US20140147947A1

    公开(公告)日:2014-05-29

    申请号:US14168971

    申请日:2014-01-30

    IPC分类号: H01L27/12

    摘要: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

    摘要翻译: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法,包括在基板上形成包括栅电极的栅极线,在栅电极上形成栅绝缘层,在栅电极上形成本征半导体 栅极绝缘层,在本征半导体上形成非本征半导体,在外部半导体上形成包括源电极和漏电极的数据线,以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理,以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此,可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺,从而可以简化显示面板的制造工艺,可以降低制造成本,并且可以提高生产率。

    DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    显示基板及其制造方法

    公开(公告)号:US20160043105A1

    公开(公告)日:2016-02-11

    申请号:US14606986

    申请日:2015-01-27

    摘要: According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.

    摘要翻译: 根据示例性实施例,显示基板包括栅极金属图案,栅极金属图案包括栅电极,设置在栅极图案上的有源图案和设置在有源图案上的源极金属图案。 源极金属图案包括设置在有源图案上的第一下部图案,设置在第一下部图案上的第二下部图案,设置在第二下部图案上的低电阻金属图案,以及设置在低电阻金属上的上部图案 模式。 第一下图案,第二下图案和上图案均包括相同的材料。

    PHOTOMASK AND THIN-FILM TRANSISTOR FABRICATED USING THE PHOTOMASK
    5.
    发明申请
    PHOTOMASK AND THIN-FILM TRANSISTOR FABRICATED USING THE PHOTOMASK 有权
    光电子和薄膜晶体管使用光电制造

    公开(公告)号:US20140147774A1

    公开(公告)日:2014-05-29

    申请号:US14170603

    申请日:2014-02-01

    IPC分类号: G03F1/38

    摘要: A photomask includes; a source electrode pattern including; a first electrode portion which extends in a first direction, a second electrode portion which extends in the first direction and is substantially parallel to the first electrode portion, and a third electrode portion which extends from a first end of the first electrode portion to a first end of the second electrode portion and is rounded with a first curvature, a drain electrode pattern which extends in the first direction and is disposed between the first electrode portion and the second electrode portion, wherein an end of the drain electrode pattern is rounded to correspond to the third electrode portion; and a channel region pattern which is disposed between the source electrode pattern and the drain electrode pattern, wherein a center location of the first curvature and a center location of the rounded portion of the end of the drain electrode pattern are the same.

    摘要翻译: 光掩模包括 源电极图案,包括: 沿第一方向延伸的第一电极部分,沿第一方向延伸并基本上平行于第一电极部分的第二电极部分,以及从第一电极部分的第一端延伸到第一电极部分的第三电极部分, 并且以第一曲率圆形化,漏电极图案,其沿第一方向延伸并且设置在第一电极部分和第二电极部分之间,其中漏极电极图案的端部被圆化以对应 到所述第三电极部分; 以及设置在源极电极图案和漏极电极图案之间的沟道区域图案,其中第一曲率的中心位置和漏极电极图案的端部的圆形部分的中心位置相同。

    THIN FILM TRANSISTOR SUBSTRATE FOR DISPLAY PANEL
    6.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE FOR DISPLAY PANEL 有权
    用于显示面板的薄膜晶体管基板

    公开(公告)号:US20130070176A1

    公开(公告)日:2013-03-21

    申请号:US13677176

    申请日:2012-11-14

    IPC分类号: H01L29/786 G02F1/1368

    摘要: A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.

    摘要翻译: 薄膜晶体管基板包括基底基板,栅极电极,栅极绝缘层,表面处理层,有源层,源电极和漏电极。 栅电极形成在基底基板上。 栅极绝缘层形成在基底基板上以覆盖栅电极。 通过用含氮气体处理栅极绝缘层,在栅极绝缘层上形成表面处理层,以防止漏电流。 在表面处理层上形成有源层以覆盖栅电极。 在有源层上形成彼此隔开预定距离的源电极和栅电极。

    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20150014677A1

    公开(公告)日:2015-01-15

    申请号:US14081160

    申请日:2013-11-15

    IPC分类号: H01L29/786 H01L29/66

    摘要: A thin film transistor substrate includes an active pattern which is disposed on a base substrate and includes a channel, a source electrode and a drain electrode, the channel which includes an oxide semiconductor, the source electrode and the drain electrode connected the channel, a gate electrode overlapped with the channel, a passivation layer which covers the source electrode, the drain electrode and the gate electrode and a fluorine deposition layer disposed between the active pattern and the passivation layer.

    摘要翻译: 薄膜晶体管基板包括设置在基底基板上并包括沟道,源电极和漏电极的有源图案,所述沟道包括氧化物半导体,源极和与漏极连接的沟道,栅极 电极与沟道重叠,覆盖源电极,漏极和栅电极的钝化层和布置在活性图案和钝化层之间的氟沉积层。

    DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20200006503A1

    公开(公告)日:2020-01-02

    申请号:US16563948

    申请日:2019-09-09

    IPC分类号: H01L29/417

    摘要: According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.