公开(公告)号：US20220020837A1

公开(公告)日：2022-01-20

申请号：US17223984

申请日：2021-04-06

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Hong KIM ,  Eun Hye KO ,  Eun Hyun KIM ,  Kyoung Won LEE ,  Sun Hee LEE ,  Jun Hyung LIM

IPC: H01L27/32

Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.

公开(公告)号：US20210327910A1

公开(公告)日：2021-10-21

申请号：US17157184

申请日：2021-01-25

Applicant: Samsung Display Co., LTD.

Inventor： Joon Seok PARK ,  So Young KOO ,  Eok Su KIM ,  Hyung Jun KIM ,  Sang Woo SOHN ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12

Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.

公开(公告)号：US20200343275A1

公开(公告)日：2020-10-29

申请号：US16818310

申请日：2020-03-13

Applicant: Samsung Display Co., LTD.

Inventor： Geun Chul PARK ,  Joon Seok PARK ,  Tae Sang KIM ,  Yeon Keon MOON ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L27/12

Abstract: A display device and a method of manufacturing the same. The display device includes a pixel connected to a scan line and a data line intersecting the scan line, and a driving transistor and a switching transistor disposed in the pixel. The driving transistor includes a substrate, a first active layer disposed on the substrate, a first gate electrode disposed on the first active layer, and a second insulating film contacting the first gate electrode and the first gate electrode. The switching transistor includes a second active layer disposed on the substrate, a second gate electrode disposed on the second active layer, a first insulating film contacting the second active layer and the second gate electrode, and a second insulating film covering the first insulating film. The first insulating film and the second insulating film are made of different materials from each other.

公开(公告)号：US20200161477A1

公开(公告)日：2020-05-21

申请号：US16752126

申请日：2020-01-24

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun LIM ,  Joon Seok PARK ,  Jay Bum KIM ,  Jun Hyung LIM ,  Kyoung Seok SON

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

公开(公告)号：US20200098924A1

公开(公告)日：2020-03-26

申请号：US16563699

申请日：2019-09-06

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Sang KIM ,  Joon Seok PARK ,  Kwang Suk KIM ,  Yeon Keon MOON ,  Geunchul PARK ,  Jun Hyung LIM ,  Kyung Jin JEON

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/467 ,  H01L29/66

Abstract: A transistor substrate may include: a substrate; an active pattern formed on the substrate, the active pattern including an oxide semiconductor that contains tin (Sn), and the active pattern including a source region, a drain region, and a channel region that is formed between the source region and the drain region; a source protective pattern formed on the source region; a drain protective pattern formed on the drain region; a gate electrode overlapping at least a portion of the channel region; an insulation interlayer covering the source protective pattern and the drain protective pattern; a source electrode formed on the insulation interlayer, the source electrode being in contact with the source protective pattern through a source contact hole that is formed in the insulation interlayer; and a drain electrode formed on the insulation interlayer, the drain electrode being in contact with the drain protective pattern through a drain contact hole that is formed in the insulation interlayer.

公开(公告)号：US20180069132A1

公开(公告)日：2018-03-08

申请号：US15691207

申请日：2017-08-30

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Hun LIM ,  Joon Seok PARK ,  Jay Bum KIM ,  Jun Hyung LIM ,  Kyoung Seok SON

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78648 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/7869 ,  H01L2029/42388

Abstract: A transistor may include a semiconductor, a source electrode, a drain electrode, and a gate electrode. The semiconductor may include a first doped region, a second doped region, a source region, a drain region, and a channel region. The channel region is positioned between the source region and the drain region. The first doped region is positioned between the channel region and the source region. The second doped region is positioned between the channel region and the drain region. A doping concentration of the first doped region is lower than a doping concentration of the source region. A doping concentration of the second doped region is lower than a doping concentration of the drain region. The source electrode is electrically connected to the source region. The drain electrode is electrically connected to the drain region. The gate electrode overlaps the channel region.

公开(公告)号：US20160133754A1

公开(公告)日：2016-05-12

申请号：US14661470

申请日：2015-03-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon MOON ,  Masataka KANO ,  Sung-Hoon YANG ,  Ji Hun LIM ,  So Young KOO ,  Myoung Hwa KIM ,  Jun Hyung LIM

IPC: H01L29/786 ,  G02F1/1368 ,  H01L29/66

CPC classification number: H01L29/78645 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78648

Abstract: A thin film transistor substrate includes a substrate, a bottom gate on the substrate, a first insulating layer on the substrate and on the bottom gate, a drain on the first insulating layer, a source on the first insulating layer, the source including a first source at a first side of the drain and a second source at a second side of the drain, an active layer on the first insulating layer, the active layer including a first active layer contacting the drain and the first source and a second active layer contacting the drain and the second source, a second insulating layer on the drain, the source, and the active layer, and a top gate on the second insulating layer.

Abstract translation: 薄膜晶体管衬底包括衬底，衬底上的底栅，衬底上的第一绝缘层和底栅，第一绝缘层上的漏极，第一绝缘层上的源，源包括第一绝缘层 漏极的第一侧的源极和在漏极的第二侧的第二源极，在第一绝缘层上的有源层，有源层包括接触漏极和第一源极的第一有源层和与第一源极接触的第二有源层 漏极和第二源极，漏极，源极和有源层上的第二绝缘层，以及第二绝缘层上的顶栅极。

公开(公告)号：US20150171226A1

公开(公告)日：2015-06-18

申请号：US14635732

申请日：2015-03-02

Applicant: Samsung Display Co., Ltd. ,  Kookmin University Industry Academy Cooperation Foundation

Inventor： Byung Du AHN ,  Ji Hun LIM ,  Jun Hyung LIM ,  Dae Hwan KIM ,  Jae Hyeong KIM ,  Je Hun LEE ,  Hyun Kwang JUNG

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78606 ,  H01L21/28 ,  H01L27/124 ,  H01L29/786 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.

Abstract translation: 薄膜晶体管显示面板a包括透明基板; 位于所述基板上的栅电极; 位于所述栅电极上的栅极绝缘层; 位于所述栅绝缘层上并包括沟道区的半导体层; 位于半导体层上且彼此面对的源电极和漏电极; 以及钝化层，被配置为覆盖所述源电极，所述漏电极和所述半导体层，其中所述半导体层包括在所述源电极和所述栅电极之间的相对较厚的第一部分，以及在所述漏电极和所述半导体层之间的相对较薄的第二部分 栅电极重叠，相对较厚的第一部分足够厚，以便如果第一部分与第二部分一样薄，则基本上可以减少否则可能在栅极电极到栅介质界面处发生的电荷捕获现象。

公开(公告)号：US20240049510A1

公开(公告)日：2024-02-08

申请号：US18312637

申请日：2023-05-05

Applicant: Samsung Display Co., LTD. ,  Industry-University Cooperation Foundation Hanyang University ERICA Campus

Inventor： Joon Seok PARK ,  Saeroonter OH ,  Su Hyun KIM ,  Taeho LEE ,  Hye Lim CHOI ,  Jun Hyung LIM

IPC: H10K59/121 ,  H10K59/124

CPC classification number: H10K59/1216 ,  H10K59/124

Abstract: According to an embodiment, a display device includes: a first capacitor electrode disposed on a substrate to include a first conductive layer and a second conductive layer disposed on the first conductive layer; a buffer layer disposed on the first capacitor electrode; a second capacitor electrode disposed on the buffer layer; a driving transistor disposed on the substrate; and a storage capacitor disposed on the substrate and electrically connected to the driving transistor, wherein the first capacitor electrode includes a concave portion and a convex portion depending on a pattern of the second conductive layer disposed on the first conductive layer, the buffer layer and the second capacitor electrode each include protrusions and depressions corresponding to the concave portion and the convex portion of the first capacitor electrode, and the first capacitor electrode and the second capacitor electrode form two electrodes of the storage capacitor.

公开(公告)号：US20240030235A1

公开(公告)日：2024-01-25

申请号：US18480494

申请日：2023-10-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： So Young KOO ,  Jay Bum KIM ,  Kyung Jin JEON ,  Eok Su KIM ,  Jun Hyung LIM

IPC: H01L27/12 ,  H01L33/62

CPC classification number: H01L27/124 ,  H01L27/1288 ,  H01L33/62 ,  H01L2933/0066

Abstract: A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.