公开(公告)号：US10256324B2

公开(公告)日：2019-04-09

申请号：US15664226

申请日：2017-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungil Park ,  Changhee Kim ,  Yunil Lee ,  Mirco Cantoro ,  Junggun You ,  Donghun Lee

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/28 ,  H01L29/40 ,  H01L29/423

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.

公开(公告)号：US11211454B2

公开(公告)日：2021-12-28

申请号：US16821491

申请日：2020-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghan Lee ,  Changhee Kim ,  Kihwan Kim ,  Suhyueon Park ,  Jaehong Choi

IPC: H01L29/08 ,  H01L27/088 ,  H01L29/167 ,  H01L21/8234 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/02 ,  H01L29/12

Abstract: A semiconductor device including an active region protruding from an upper surface of a substrate and extending in a first horizontal direction, at least two gate electrodes extending in a second horizontal direction and crossing the active region, the second horizontal direction crossing the first horizontal direction, a source/drain region in the active region between the gate electrodes may be provided. The source/drain region includes a recess region, an outer doped layer on an inner wall of the recess region, an intermediate doped layer on the outer doped layer, and an inner doped layer on the intermediate doped layer and filling the recess region. One of the outer doped layer or the intermediate doped layer includes antimony, and the inner doped layer includes phosphorous.

公开(公告)号：US11682698B2

公开(公告)日：2023-06-20

申请号：US17541878

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghan Lee ,  Changhee Kim ,  Kihwan Kim ,  Suhyueon Park ,  Jaehong Choi

IPC: H01L29/08 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/78 ,  H01L29/167 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06 ,  H01L29/36

CPC classification number: H01L29/0847 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/086 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/0886 ,  H01L29/167 ,  H01L29/42392 ,  H01L29/78696

Abstract: A semiconductor device including an active region protruding from an upper surface of a substrate and extending in a first horizontal direction, at least two gate electrodes extending in a second horizontal direction and crossing the active region, the second horizontal direction crossing the first horizontal direction, a source/drain region in the active region between the gate electrodes may be provided. The source/drain region includes a recess region, an outer doped layer on an inner wall of the recess region, an intermediate doped layer on the outer doped layer, and an inner doped layer on the intermediate doped layer and filling the recess region. One of the outer doped layer or the intermediate doped layer includes antimony, and the inner doped layer includes phosphorous.

公开(公告)号：US10559673B2

公开(公告)日：2020-02-11

申请号：US16284843

申请日：2019-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungil Park ,  Changhee Kim ,  Yunil Lee ,  Mirco Cantoro ,  Junggun You ,  Donghun Lee

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/28 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.

公开(公告)号：US20180248018A1

公开(公告)日：2018-08-30

申请号：US15664226

申请日：2017-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungil Park ,  Changhee Kim ,  Yunil Lee ,  Mirco Cantoro ,  Junggun You ,  Donghun Lee

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/28 ,  H01L29/40

CPC classification number: H01L29/66666 ,  H01L21/28114 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/401 ,  H01L29/4238 ,  H01L29/66553 ,  H01L29/7827

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.