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公开(公告)号:US12211581B2
公开(公告)日:2025-01-28
申请号:US18047614
申请日:2022-10-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Donghun Lee , Daesik Moon , Young-Soo Sohn , Young-Hoon Son , Ki-Seok Oh , Changkyo Lee , Hyun-Yoon Cho , Kyung-Soo Ha , Seokhun Hyun
Abstract: A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.
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公开(公告)号:US10162568B2
公开(公告)日:2018-12-25
申请号:US15242642
申请日:2016-08-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Soo-Young Ji , Donghun Lee
Abstract: A matching key search method of a server system including a storage device, the storage device including a nonvolatile memory device and a buffer memory. The matching key search method includes receiving a search command for a keyword from a host, reading data from a memory area of the memory device corresponding to an address included in the search command and storing the read data in the buffer memory, determining whether the read data matches the keyword, transmitting a result of the determining to the host without transmitting the read data to the host, and generating a matching key table with reference to the result of the determining and storing the generated matching key table in the buffer memory.
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公开(公告)号:US09996460B2
公开(公告)日:2018-06-12
申请号:US15147337
申请日:2016-05-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Donghun Lee , Moonsang Kwon , HyungJin Im
CPC classification number: G06F3/061 , G06F3/0659 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06N99/005
Abstract: A method of operating a storage device according to an exemplary embodiment includes receiving a first target value and a second target value of a plurality of target values respectively corresponding to a first operating parameter and a second operating parameter of a plurality of target values of operating parameters from a host, loading a first existing value and a second existing value of a plurality of existing values of the first operating parameter and the second operating parameter, processing a machine learning algorithm using the first target value, the second target value, the first existing value and the second existing value to generate an adaptive schedule, and executing the background operation based on the schedule.
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公开(公告)号:US12202123B2
公开(公告)日:2025-01-21
申请号:US17835269
申请日:2022-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jaeyoon Jeong , Donghun Lee , Jinhee Kim , Minwoo Ryu
Abstract: A cleaning robot is provided. The cleaning robot includes a body, a light detection and ranging (LiDAR) module having a LiDAR sensor rotatably supported by the body, a light-emitting display module mounted on the LiDAR module, wherein the light-emitting display module is configured to display an image based on an afterimage effect according to a rotation of the LiDAR module.
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公开(公告)号:US20240194648A1
公开(公告)日:2024-06-13
申请号:US18533800
申请日:2023-12-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dawoon Jung , Seungduk Baek , Donghun Lee
IPC: H01L25/065 , H01L23/00 , H10B80/00
CPC classification number: H01L25/0657 , H01L24/08 , H10B80/00 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/08145 , H01L2224/08225 , H01L2224/16148 , H01L2224/16227 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2924/1431 , H01L2924/1436 , H01L2924/3511
Abstract: A semiconductor package includes a base structure and a plurality of semiconductor chips disposed on the base structure. Each of the plurality of semiconductor chips has a chip region. The plurality of semiconductor chips are stacked in a vertical direction such that chip regions at least partially overlap each other. In the stack of the plurality of semiconductor chips, each of the plurality of semiconductor chips has a first width in a first direction and a second width in a second direction. The plurality of semiconductor chips include a first semiconductor chip and a second semiconductor chip, having scribe regions on opposite sides of each of the chip regions. A first width of the first semiconductor chip is greater than a first width of the second semiconductor chip.
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公开(公告)号:US10305494B2
公开(公告)日:2019-05-28
申请号:US15599191
申请日:2017-05-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hoon Lee , Donghun Lee , Jaewon Lee
Abstract: A delay locked loop includes a delay line, a delay circuit, a phase detector, a delay code generator, and a delay controller. The delay line may delay an input clock signal in units of unit delay in response to a delay control code to generate an output clock signal. The delay circuit may delay the output clock signal to generate a delay clock signal. The phase detector may compare the input clock signal and the delay clock signal to generate a phase detection signal. The delay code generator may compare the input clock signal and the delay clock signal to detect a phase difference therebetween, and generate a delay code using the phase difference. The delay controller may generate the delay control code using the delay code and the phase detection signal.
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公开(公告)号:US10082984B2
公开(公告)日:2018-09-25
申请号:US15134791
申请日:2016-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghun Lee , Isaac Baek , Hyesung Kim
IPC: G06F3/06 , G06F12/1009 , G06F13/42 , G06F17/30 , G06F12/02
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/061 , G06F3/0616 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1009 , G06F13/4282 , G06F16/22 , G06F16/24568 , G06F2212/1024 , G06F2212/2022 , G06F2212/7201 , G06F2212/7202
Abstract: A method of operating a storage device that controls input/output of multi-stream data according to a stream ID may include receiving, from a host, a stream control command controlling at least a first stream ID and a second stream ID, determining, in response to the received stream control command, a third stream ID including control commands for the first and second stream IDs, and transmitting the third stream ID to the host.
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公开(公告)号:US09698244B2
公开(公告)日:2017-07-04
申请号:US15062742
申请日:2016-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinbum Kim , Jaeyoung Park , Donghun Lee , Jeongho Yoo , Jieon Yoon , Kwan Heum Lee , Choeun Lee , Bonyoung Koo
IPC: H01L29/66 , H01L29/04 , H01L29/12 , H01L29/417 , H01L29/423 , H01L29/40 , H01L21/30
CPC classification number: H01L29/66636 , H01L21/3003 , H01L29/045 , H01L29/0847 , H01L29/12 , H01L29/165 , H01L29/401 , H01L29/41766 , H01L29/42356 , H01L29/66545 , H01L29/78
Abstract: A method of fabricating a semiconductor device is provided as follows. A source/drain pattern is formed on a substrate. The source/drain pattern contains silicon atoms and germanium atoms. At least one germanium atom is removed from the germanium atoms of the source/drain pattern.
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公开(公告)号:US20250142814A1
公开(公告)日:2025-05-01
申请号:US18667445
申请日:2024-05-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yonghyeok Son , Jeongil Seo , Donghun Lee , Seungmo Kang , Seung Joo Lee , Yujin Cho , Seongjun Choi
IPC: H10B12/00
Abstract: A semiconductor device includes an interconnection line, an insulating layer on the interconnection line and having an opening exposing a top surface of the interconnection line, and a redistribution pattern extending into the opening and electrically connected to the interconnection line at a bottom surface of the opening. The interconnection line is configured to provide a current path in a first direction in a region adjacent to the redistribution pattern. The opening comprises a first side surface facing the first direction. A corner region of the opening protrudes away from or is recessed towards the opening at an end portion of the first side surface of the opening when viewed in plan view.
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公开(公告)号:US20250006233A1
公开(公告)日:2025-01-02
申请号:US18885337
申请日:2024-09-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghun Lee , Kiho Kim , Kihan Kim
IPC: G11C7/10
Abstract: Disclosed are a memory device that performs offset calibration and a method of operating the memory device. The memory device includes an input/output pad configured to receive data from a device external, an on-die termination (ODT) circuit connected to the input/output pad, a plurality of receivers connected to the ODT circuit and configured to receive the data from the input/output pad, an offset calibration circuit configured to perform an offset calibration operation on data output from the plurality of receivers and output an offset correction, a first switch configured to provide a first voltage to the plurality of receivers, and a second switch configured to provide a second voltage to the plurality of receivers. During the offset calibration operation, the plurality of receivers receive a third voltage in response to the ODT circuit being enabled and the first voltage through the first switch.
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