公开(公告)号：US11810964B2

公开(公告)日：2023-11-07

申请号：US17060193

申请日：2020-10-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongseok Suh ,  Daewon Kim ,  Beomjin Park ,  Sukhyung Park ,  Sungil Park ,  Jaehoon Shin ,  Bongseob Yang ,  Junggun You ,  Jaeyun Lee

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/423 ,  H01L29/786 ,  H01L29/772 ,  H01L21/28 ,  H01L21/8234

CPC classification number: H01L29/6656 ,  H01L29/1033 ,  H01L29/42376 ,  H01L29/66553 ,  H01L29/78696 ,  H01L21/28141 ,  H01L21/823468 ,  H01L29/1037 ,  H01L29/66719 ,  H01L29/7727

Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.

公开(公告)号：US20220165729A1

公开(公告)日：2022-05-26

申请号：US17382956

申请日：2021-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehoon Shin ,  Bongseok Suh ,  Daewon Kim ,  Sukhyung Park ,  Junggun You ,  Jaeyun Lee

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor device may include a substrate including first and second active regions and a field region therebetween, first and second active patterns respectively provided on the first and second active regions, first and second source/drain patterns respectively provided on the first and second active patterns, a first channel pattern between the first source/drain patterns and a second channel pattern between the second source/drain patterns, and a gate electrode extended from the first channel pattern to the second channel pattern to cross the field region. Each of the first and second channel patterns may include semiconductor patterns, which are stacked to be spaced apart from each other. A width of a lower portion of the gate electrode on the field region may decrease with decreasing distance from a top surface of the substrate.

公开(公告)号：US12040401B2

公开(公告)日：2024-07-16

申请号：US17994565

申请日：2022-11-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junggun You ,  Joohee Jung ,  Jaehyeoung Ma ,  Namhyun Lee

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/785 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/1033 ,  H01L29/42392 ,  H01L2029/7858

Abstract: A semiconductor device including a substrate having a central region and a peripheral region; an integrated circuit structure on the central region; and a first structure on the peripheral region and surrounding the central region, wherein a portion of the first structure includes a first fin structure defined by a device isolation region in the substrate; a first dielectric layer covering an upper surface and side surfaces of the first fin structure and an upper surface of the device isolation region; a first gate structure on the first fin structure, the first gate structure including a first gate conductive layer, a first gate dielectric layer covering lower and side surfaces of the first gate conductive layer, and first gate spacer layers on side walls of the first gate conductive layer; and a first insulating structure covering the first dielectric layer and the first gate structure.

公开(公告)号：US11996406B2

公开(公告)日：2024-05-28

申请号：US18148233

申请日：2022-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junggun You ,  Sungil Park ,  Joohee Jung ,  Sunggi Hur

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/088 ,  H01L21/823456 ,  H01L21/823481

Abstract: A semiconductor device includes a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction; a device isolation layer between the first and second active regions in the substrate; and first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions. The first gate structure includes a first gate electrode. The second gate structure includes a second gate electrode. The first gate structure protrudes further toward the device isolation layer, as compared to the second gate structure, in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.

公开(公告)号：USRE49963E1

公开(公告)日：2024-05-07

申请号：US17155615

申请日：2021-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan Kim ,  Gigwan Park ,  Junggun You ,  DongSuk Shin ,  Jin-Wook Kim

IPC: H01L29/78 ,  H01L21/8238 ,  H01L21/84 ,  H01L23/535 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/66 ,  H10B10/00 ,  H01L27/12 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L23/535 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/66636 ,  H10B10/12 ,  H10B10/18 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/165

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US20240038873A1

公开(公告)日：2024-02-01

申请号：US18483413

申请日：2023-10-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongseok Suh ,  Daewon Kim ,  Beomjin Park ,  Sukhyung Park ,  Sungil Park ,  Jaehoon Shin ,  Bongseob Yang ,  Junggun You ,  Jaeyun Lee

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/6656 ,  H01L29/1033 ,  H01L29/42376 ,  H01L29/78696 ,  H01L29/66553 ,  H01L29/7727

Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.

公开(公告)号：US11545489B2

公开(公告)日：2023-01-03

申请号：US17180989

申请日：2021-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junggun You ,  Sungil Park ,  Joohee Jung ,  Sunggi Hur

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/768 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device includes a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction; a device isolation layer between the first and second active regions in the substrate; and first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions. The first gate structure includes a first gate electrode. The second gate structure includes a second gate electrode. The first gate structure protrudes further toward the device isolation layer, as compared to the second gate structure, in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.

公开(公告)号：US10784376B2

公开(公告)日：2020-09-22

申请号：US16450193

申请日：2019-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Hwan Kim ,  Gigwan Park ,  Junggun You ,  DongSuk Shin ,  Jin-Wook Kim

IPC: H01L29/78 ,  H01L21/8238 ,  H01L23/535 ,  H01L27/092 ,  H01L27/11 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/66 ,  H01L27/12 ,  H01L21/84 ,  H01L29/165

Abstract: A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

公开(公告)号：US10559673B2

公开(公告)日：2020-02-11

申请号：US16284843

申请日：2019-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungil Park ,  Changhee Kim ,  Yunil Lee ,  Mirco Cantoro ,  Junggun You ,  Donghun Lee

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/28 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.

公开(公告)号：US20180248018A1

公开(公告)日：2018-08-30

申请号：US15664226

申请日：2017-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungil Park ,  Changhee Kim ,  Yunil Lee ,  Mirco Cantoro ,  Junggun You ,  Donghun Lee

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L21/28 ,  H01L29/40

CPC classification number: H01L29/66666 ,  H01L21/28114 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/401 ,  H01L29/4238 ,  H01L29/66553 ,  H01L29/7827

Abstract: A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.