SEMICONDUCTOR MEMORY DEVICES
    1.
    发明申请

    公开(公告)号:US20220343966A1

    公开(公告)日:2022-10-27

    申请号:US17559110

    申请日:2021-12-22

    Abstract: A semiconductor memory device includes a memory cell array that includes memory cells arranged in rows and columns, a row decoder that is configured to receive a row address, decode the row address, and adjust voltages of selection lines based on the decoded row address, a word line driver that is connected with the selection lines, is connected with the rows of the memory cells through word lines, and is configured to adjust voltages of the word lines in response to an internal clock signal and the voltages of the selection lines, and a detection circuit that is connected with the word lines and is configured to activate a detection signal in response to voltages of the word lines being identical at a specific timing.

    MEMORY DEVICE HAVING FAULT DETECTION FUNCTIONALITY AND CONTROL SYSTEM INCLUDING THE SAME

    公开(公告)号:US20210174860A1

    公开(公告)日:2021-06-10

    申请号:US16916280

    申请日:2020-06-30

    Abstract: A memory device having fault detection functionality for improving functional safety and a control system including the memory device are provided. The memory device includes a first memory cell array configured to store input data and output the input data as output data and a second memory cell array configured to store bit values of a row address and a column address of the first memory cell array in which the input data is stored, and output the bit values of the row address and the column address as an internal row address and an internal column address. The row/column address designating a read operation may be compared to the internal row/column address, and an address comparison signal as a result of the comparison may be output. The address comparison signal may provide fault detection functionality for a data error of an automotive electronic system.

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