Method and apparatus for processing macro instruction using one or more shared operators

    公开(公告)号:US10564971B2

    公开(公告)日:2020-02-18

    申请号:US15535304

    申请日:2015-10-15

    Abstract: A processor includes: at least one operator; and at least one macro instruction processing unit configured to share the at least one operator, wherein the at least one macro instruction processing unit is configured to execute a macro instruction with respect to input data by using the at least one operator to output result data, and to control the at least one operator to perform an operation included in the macro instruction, and the at least one macro instruction processing unit comprises: a scheduler configured to manage schedules of the at least one operator and output input data and a control signal to the at least one operator; and a controller configured to control the scheduler to execute the macro instruction and to receive the result data from the scheduler.

    Nonvolatile memory device for varying a recovery section and operating method thereof

    公开(公告)号:US10332602B2

    公开(公告)日:2019-06-25

    申请号:US15839121

    申请日:2017-12-12

    Inventor: Doo-hyun Kim

    Abstract: Provided is a method of operating a nonvolatile memory device including a memory cell array connected to a plurality of lines. The method may include performing a first loop including a first recovery section having a first operation time period, on a first line of the plurality of lines by applying a first voltage for a time period, wherein the first voltage is discharged with a first slope, and performing a second loop after the first loop including a second recovery section having a second operation time period that is different from the first operation time period, on the first line by applying a second voltage for a time period, wherein the second voltage is discharged with a second slope less than the first slope.

    APPARATUS AND METHOD OF RESTORING IMAGE
    4.
    发明申请
    APPARATUS AND METHOD OF RESTORING IMAGE 审中-公开
    装置和恢复图像的方法

    公开(公告)号:US20160073123A1

    公开(公告)日:2016-03-10

    申请号:US14940581

    申请日:2015-11-13

    CPC classification number: H04N19/40 H04N19/577 H04N19/61 H04N19/86 H04N19/895

    Abstract: Restoring an image is achieved by restoring a block by executing at least one first restoring function and at least one second restoring function. The first restoring function may be implemented using software, and the second restoring function may be implemented using hardware. By assigning restoring functions to be either first restoring functions or second restoring functions, even an image having high resolution can be restored and reproduced in real-time.

    Abstract translation: 通过执行至少一个第一恢复功能和至少一个第二恢复功能来恢复块来实现恢复图像。 可以使用软件来实现第一恢复功能,并且可以使用硬件来实现第二恢复功能。 通过将恢复功能分配为第一恢复功能或第二恢复功能,即使具有高分辨率的图像也可以被实时地恢复和再现。

    Processing apparatuses and controlling methods thereof

    公开(公告)号:US10694190B2

    公开(公告)日:2020-06-23

    申请号:US15716995

    申请日:2017-09-27

    Abstract: A processing apparatus has a processor including a first memory. The processor divides a frame in video content into a plurality of coding units (CUs), and encodes the plurality of CUs in a diagonal direction to generate an encoded frame, wherein when a first CU is encoded based on a first encoding type, the processor is further configured to load, from a second memory, a first partial region of a reference frame corresponding to first position information of the first CU to the first memory and encode the first CU based on the first partial region of the reference frame loaded from the second memory, and wherein, when the first CU is encoded based on a second encoding type, the processor is further configured to encode the first CU based on a first reference pixel value corresponding to the first position information of the first CU from the first memory.

    Programming method of a nonvolatile memory device and a method thereof

    公开(公告)号:US10157674B2

    公开(公告)日:2018-12-18

    申请号:US15714155

    申请日:2017-09-25

    Abstract: A soft erase method of a memory device including applying a program voltage to a first memory cell in at least one of program loops when a plurality of program loops are performed to program the first memory cell into a Nth programming state, wherein the first memory cell is included in a selected memory cell string connected to a selected first bit line and is connected to a selected word line; and soft erasing a second memory cell by applying, in a first verification interval, a read voltage for verifying a programming state of the first memory cell to the selected word line and applying a first prepulse to a gate of a string select transistor of each of a plurality of unselected memory cell strings connected to the first bin line and a plurality of unselected memory cell strings connected to an unselected second bit line.

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