公开(公告)号：US11682633B2

公开(公告)日：2023-06-20

申请号：US17181617

申请日：2021-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Yong Park ,  Duckgyu Kim

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/3185 ,  H01L23/367 ,  H01L23/4985 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/351

Abstract: Disclosed is a semiconductor package including a base film that has a first surface and a second surface opposite to the first surface, a plurality of input/output lines on the first surface of the base film, a semiconductor chip disposed on the first surface of the base film and connected to the input/output lines and including a central portion and end portions on opposite sides of the central portion, and a heat radiation pattern on the second surface of the base film. The heat radiation pattern corresponds to the semiconductor chip and has a plurality of openings that correspond to the end portions of the semiconductor chip and that vertically overlap the end portions of the semiconductor chip.

公开(公告)号：US11600556B2

公开(公告)日：2023-03-07

申请号：US17230662

申请日：2021-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minki Kim ,  Duckgyu Kim ,  Jae-Min Jung ,  Jeong-Kyu Ha ,  Sang-Uk Han

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367

Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, a first chip pad on a bottom surface of the semiconductor chip and adjacent to a first lateral surface in a first direction of the semiconductor chip, the first lateral surface separated from the first chip pad from a plan view in a first direction, and a first lead frame coupled to the first chip pad. The first lead frame includes a first segment on a bottom surface of the first chip pad and extending from the first chip pad in a second direction opposite to the first direction and away from the first lateral surface of the semiconductor chip, and a second segment which connects to a first end of the first segment and then extends along the first direction to extend beyond the first lateral surface of the semiconductor chip after passing one side of the first chip pad, when viewed in the plan view.

公开(公告)号：US11756869B2

公开(公告)日：2023-09-12

申请号：US17675209

申请日：2022-02-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gayoung Kim ,  Duckgyu Kim

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L23/3114 ,  H01L23/49822 ,  H01L23/49838

Abstract: A semiconductor package includes; a semiconductor chip, a conductive pattern electrically connected to the semiconductor chip, a pad electrically connected to the conductive pattern, and a connection member disposed on and electrically connected to the pad. The pad includes a central portion and a peripheral portion at least partially surrounding the central portion and separated from the peripheral portion by a gap, and the connection member contacts at least one of a side surface of the central portion and an inner side surface of the peripheral portion.

公开(公告)号：US11276633B2

公开(公告)日：2022-03-15

申请号：US16905560

申请日：2020-06-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gayoung Kim ,  Duckgyu Kim

IPC: H01L23/498 ,  H01L23/31

Abstract: A semiconductor package includes; a semiconductor chip, a conductive pattern electrically connected to the semiconductor chip, a pad electrically connected to the conductive pattern, and a connection member disposed on and electrically connected to the pad. The pad includes a central portion and a peripheral portion at least partially surrounding the central portion and separated from the peripheral portion by a gap, and the connection member contacts at least one of a side surface of the central portion and an inner side surface of the peripheral portion.

公开(公告)号：US20250014953A1

公开(公告)日：2025-01-09

申请号：US18764401

申请日：2024-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Duckgyu Kim ,  Sanguk Han

IPC: H01L23/13 ,  H01L21/48 ,  H01L21/78 ,  H01L23/498

Abstract: Provided is a semiconductor package including a rewiring structure including a rewiring pattern, and at least one insulating layer, a semiconductor device provided on the rewiring structure, and electrically connected to the rewiring pattern, and a side surface protector covering a first side surface of the semiconductor device, wherein an upper surface of the semiconductor device that is opposite to a lower surface of the semiconductor device facing the rewiring structure and an upper surface of the side surface protector are at the same vertical level and are coplanar with each other, and the side surface protector extends from the insulating layer of the rewiring structure.

公开(公告)号：US20240321792A1

公开(公告)日：2024-09-26

申请号：US18607941

申请日：2024-03-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Duckgyu Kim

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L2224/02255 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2924/0495 ,  H01L2924/0509 ,  H01L2924/05341

Abstract: Provided is a semiconductor package including a semiconductor chip, a pad structure electrically connected to the semiconductor chip, a solder ball spaced apart from the semiconductor chip in a first direction and in contact with the pad structure, and an insulating layer arranged between the semiconductor chip and the pad structure and in contact with the pad structure, wherein the insulating layer includes a first ring-shaped groove having a ring shape surrounding the pad structure, and the first ring-shaped groove is spaced apart from the pad structure.

公开(公告)号：US11728261B2

公开(公告)日：2023-08-15

申请号：US17314567

申请日：2021-05-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Duckgyu Kim

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/3185 ,  H01L23/3672 ,  H01L23/4985 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/18161

Abstract: A chip-on-film (CoF) package and a display apparatus, the package including a base film having an upper surface and a lower surface facing each other; a conductive line on the upper surface of the base film; a semiconductor chip on the upper surface of the base film and connected to the conductive line through a bump structure; a heat radiator on the lower surface of the base film and underlying the semiconductor chip; an adhesive layer between the lower surface of the base film and the heat radiator; and a plurality of dam structures in the adhesive layer and overlapping the bump structure.