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1.发明授权公开(公告)号：US11417731B2
公开(公告)日：2022-08-16
申请号：US17128153
申请日：2020-12-20
发明人： Jinbum Kim , Dahye Kim , Seokhoon Kim , Jaemun Kim , Ilgyou Shin , Haejun Yu , Kyungin Choi , Kihyun Hwang , Sangmoon Lee , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/08 , H01L27/092 , H01L29/165 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H01L29/161 , H01L29/06 , H01L21/8238
摘要： A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.
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公开(公告)号：US20230275092A1
公开(公告)日：2023-08-31
申请号：US18143767
申请日：2023-05-05
发明人： KYUNGIN CHOI , Jinbum Kim , Haejun Yu , Seung Hun Lee
IPC分类号： H01L27/092 , H01L29/417 , H01L29/66 , H01L29/78
CPC分类号： H01L27/0924 , H01L29/41791 , H01L29/66553 , H01L29/66795 , H01L29/7851
摘要： A semiconductor device includes: a first active pattern on a substrate and including a first active fin and a second active fin; a device isolation layer defining the first active pattern; a gate electrode crossing the first active pattern; a first source/drain pattern and a second source/drain pattern on the first active fin and the second active fin, respectively; an inner fin spacer between the first and second source/drain patterns; and a buffer layer between the first and second active fins, wherein the inner fin spacer includes: a first inner spacer portion contacting the first source/drain pattern; a second inner spacer portion contacting the second source/drain pattern; and an inner extended portion extending from the first and second inner spacer portions, wherein the inner extended portion is between the first and second active fins, wherein the buffer layer has a dielectric constant higher than that of the inner fin spacer.
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公开(公告)号：US12113108B2
公开(公告)日：2024-10-08
申请号：US17472926
申请日：2021-09-13
发明人： Dohee Kim , Gyeom Kim , Jinbum Kim , Haejun Yu , Kyungin Choi , Kihyun Hwang , Seunghun Lee
IPC分类号： H01L29/41 , H01L27/088 , H01L29/417
CPC分类号： H01L29/41775 , H01L27/0886
摘要： An integrated circuit device includes a plurality of gate structures each including a gate line extending on a fin-type active region and insulation spacers on sidewalls of the gate line; a source/drain contact between first and second gate structures, and having opposing sides that are asymmetric in the first horizontal direction; and an insulation liner on sidewalls of the source/drain contact. The source/drain contact includes a lower contact portion and an upper contact portion having a horizontal extension that extends on an upper corner of the first gate structure, the insulation liner includes a first local region between the upper corner and the horizontal extension and a second local region that is farther from the substrate than the first local region, and a thickness of the first local region is greater than that of the second local region.
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公开(公告)号：US20240088150A1
公开(公告)日：2024-03-14
申请号：US18300867
申请日：2023-04-14
发明人： Yeondo Jung , Chul Kim , Kichul Kim , Gwirim Park , Haejun Yu , Chaeyeong Lee , Kyungin Choi
IPC分类号： H01L27/092 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L27/092 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/775 , H01L29/78696
摘要： An integrated circuit device includes a pair of fin-type active regions, which extend in a first horizontal direction on a substrate, and a fin isolation insulator between ones of the pair of fin-type active regions to extend in a second horizontal direction that intersects with the first horizontal direction. The fin isolation insulator includes a first nitrogen-rich barrier film having at least one protrusion at a position that is higher than respective top surfaces of each of the pair of fin-type active regions with respect to the substrate, and a second nitrogen-rich barrier film, which is spaced apart from the first nitrogen-rich barrier film and is in a space defined by the first nitrogen-rich barrier film.
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公开(公告)号：US11888028B2
公开(公告)日：2024-01-30
申请号：US17862453
申请日：2022-07-12
发明人： Jinbum Kim , Dahye Kim , Seokhoon Kim , Jaemun Kim , Ilgyou Shin , Haejun Yu , Kyungin Choi , Kihyun Hwang , Sangmoon Lee , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/08 , H01L21/8238 , H01L27/092 , H01L29/165 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H01L29/161 , H01L21/8234 , H01L29/06
CPC分类号： H01L29/0847 , H01L21/823814 , H01L21/823828 , H01L27/092 , H01L29/165 , H01L29/42392 , H01L29/66545 , H01L29/78 , H01L29/7848 , H01L29/78696
摘要： A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.
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公开(公告)号：US20220246738A1
公开(公告)日：2022-08-04
申请号：US17472926
申请日：2021-09-13
发明人： Dohee Kim , Gyeom Kim , Jinbum Kim , Haejun Yu , Kyungin Choi , Kihyun Hwang , Seunghun Lee
IPC分类号： H01L29/417 , H01L27/088
摘要： An integrated circuit device includes a plurality of gate structures each including a gate line extending on a fin-type active region and insulation spacers on sidewalls of the gate line; a source/drain contact between first and second gate structures, and having opposing sides that are asymmetric in the first horizontal direction; and an insulation liner on sidewalls of the source/drain contact. The source/drain contact includes a lower contact portion and an upper contact portion having a horizontal extension that extends on an upper corner of the first gate structure, the insulation liner includes a first local region between the upper corner and the horizontal extension and a second local region that is farther from the substrate than the first local region, and a thickness of the first local region is greater than that of the second local region.
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公开(公告)号：US12046632B2
公开(公告)日：2024-07-23
申请号：US18182893
申请日：2023-03-13
发明人： Haejun Yu , Kyungin Choi , Seung Hun Lee
IPC分类号： H01L29/06 , B82Y10/00 , H01L21/8238 , H01L27/092 , H01L29/08 , H01L29/10 , H01L29/161 , H01L29/165 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/775 , H01L29/78 , H01L29/786
CPC分类号： H01L29/0653 , H01L29/42392 , H01L29/4991 , H01L29/66553 , H01L27/092
摘要： A semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern connected to the source/drain pattern, the channel pattern including semiconductor patterns stacked and spaced apart from each other, a gate electrode extending across the channel pattern, and inner spacers between the gate electrode and the source/drain pattern. The semiconductor patterns include stacked first and second semiconductor patterns. The gate electrode includes first and second portions, which are sequentially stacked between the substrate and the first and second semiconductor patterns, respectively. The inner spacers include first and second air gaps, between the first and second portions of the gate electrode and the source/drain pattern. The largest width of the first air gap is larger than that of the second air gap.
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公开(公告)号：US12034043B2
公开(公告)日：2024-07-09
申请号：US17479424
申请日：2021-09-20
发明人： Jinbum Kim , Gyeom Kim , Hyojin Kim , Haejun Yu , Seunghun Lee , Kyungin Choi
IPC分类号： H01L29/06 , H01L29/66 , H01L29/786
CPC分类号： H01L29/0665 , H01L29/0653 , H01L29/6656 , H01L29/78618 , H01L29/78696
摘要： An integrated circuit device includes: a fin-type active region extending in a first horizontal direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region and extending in a second horizontal direction crossing the first horizontal direction, an insulating spacer covering a sidewall of the gate line, a source/drain region connected to the channel region on the fin-type active region and including a first portion facing the sidewall of the gate line with the insulating spacer therebetween, an air gap between the insulating spacer and the first portion of the source/drain region, and an insulating liner including a portion in contact with the source/drain region and a portion defining a size of the air gap.
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公开(公告)号：US11682673B2
公开(公告)日：2023-06-20
申请号：US17231502
申请日：2021-04-15
发明人： Kyungin Choi , Jinbum Kim , Haejun Yu , Seung Hun Lee
IPC分类号： H01L27/092 , H01L29/417 , H01L29/66 , H01L29/78
CPC分类号： H01L27/0924 , H01L29/41791 , H01L29/66553 , H01L29/66795 , H01L29/7851
摘要： A semiconductor device includes: a first active pattern on a substrate and including a first active fin and a second active fin; a device isolation layer defining the first active pattern; a gate electrode crossing the first active pattern; a first source/drain pattern and a second source/drain pattern on the first active fin and the second active fin, respectively; an inner fin spacer between the first and second source/drain patterns; and a buffer layer between the first and second active fins, wherein the inner fin spacer includes: a first inner spacer portion contacting the first source/drain pattern; a second inner spacer portion contacting the second source/drain pattern; and an inner extended portion extending from the first and second inner spacer portions, wherein the inner extended portion is between the first and second active fins, wherein the buffer layer has a dielectric constant higher than that of the inner fin spacer.
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公开(公告)号：US11605711B2
公开(公告)日：2023-03-14
申请号：US17242823
申请日：2021-04-28
发明人： Haejun Yu , Kyungin Choi , Seung Hun Lee
IPC分类号： H01L29/06 , H01L29/66 , H01L21/8238 , H01L29/423 , H01L29/775 , H01L27/092 , H01L29/10 , H01L29/08 , H01L29/417 , H01L29/49 , H01L29/161 , H01L29/165 , H01L29/786 , H01L29/78 , B82Y10/00
摘要： A semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern connected to the source/drain pattern, the channel pattern including semiconductor patterns stacked and spaced apart from each other, a gate electrode extending across the channel pattern, and inner spacers between the gate electrode and the source/drain pattern. The semiconductor patterns include stacked first and second semiconductor patterns. The gate electrode includes first and second portions, which are sequentially stacked between the substrate and the first and second semiconductor patterns, respectively. The inner spacers include first and second air gaps, between the first and second portions of the gate electrode and the source/drain pattern. The largest width of the first air gap is larger than that of the second air gap.
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