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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20170077034A1

    公开(公告)日：2017-03-16

    申请号：US15358217

    申请日：2016-11-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Seung Song ,  Hyeonuk Kim

    IPC: H01L23/535 ,  H01L21/8238 ,  H01L29/417 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8234 ,  H01L27/02

    CPC classification number: H01L23/535 ,  H01L21/823475 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L29/41725 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device includes a first gate electrode provided in a jumper region of a substrate and extending in a first direction, first source/drain regions provided at both sides of the first gate electrode, and a connecting contact electrically connecting the first gate electrode and the first source/drain regions to each other. The connecting contact includes first sub-contacts disposed at both sides of the first gate electrode and connected to the first source/drain regions, and a second sub-contact extending in a second direction intersecting the first direction. The second sub-contact is connected to the first sub-contacts and is in contact with a top surface of the first gate electrode. In the first direction, each of the first sub-contacts has a first width and the second sub-contact has a second width smaller than the first width.

    Abstract translation: 半导体器件包括设置在衬底的跨接区域中并沿第一方向延伸的第一栅电极，设置在第一栅极两侧的第一源/漏区和将第一栅电极和第二栅电极电连接的连接接点， 第一源极/漏极区彼此。 连接触点包括设置在第一栅电极的两侧并连接到第一源/漏区的第一子触点和沿与第一方向相交的第二方向延伸的第二副触点。 第二子触点连接到第一子触点并与第一栅电极的顶表面接触。 在第一方向上，每个第一子接触具有第一宽度，而第二子接触具有小于第一宽度的第二宽度。

    Semiconductor device and method of manufacturing the same
    7.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US09536835B2

    公开(公告)日：2017-01-03

    申请号：US14625015

    申请日：2015-02-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Seung Song ,  Hyeonuk Kim

    IPC: H01L29/78 ,  H01L27/08 ,  H01L23/535 ,  H01L27/02 ,  H01L27/092 ,  H01L29/417 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/8238

    CPC classification number: H01L23/535 ,  H01L21/823475 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L29/41725 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device includes a first gate electrode provided in a jumper region of a substrate and extending in a first direction, first source/drain regions provided at both sides of the first gate electrode, and a connecting contact electrically connecting the first gate electrode and the first source/drain regions to each other. The connecting contact includes first sub-contacts disposed at both sides of the first gate electrode and connected to the first source/drain regions, and a second sub-contact extending in a second direction intersecting the first direction. The second sub-contact is connected to the first sub-contacts and is in contact with a top surface of the first gate electrode. In the first direction, each of the first sub-contacts has a first width and the second sub-contact has a second width smaller than the first width.

    Abstract translation: 半导体器件包括设置在衬底的跨接区域中并沿第一方向延伸的第一栅电极，设置在第一栅极两侧的第一源/漏区和将第一栅电极和第二栅电极电连接的连接接点， 第一源极/漏极区彼此。 连接触点包括设置在第一栅电极的两侧并连接到第一源/漏区的第一子触点和沿与第一方向相交的第二方向延伸的第二副触点。 第二子触点连接到第一子触点并与第一栅电极的顶表面接触。 在第一方向上，每个第一子接触具有第一宽度，而第二子接触具有小于第一宽度的第二宽度。

    Neural network method and apparatus
    9.
    发明授权
    Neural network method and apparatus 有权

    公开(公告)号：US10909418B2

    公开(公告)日：2021-02-02

    申请号：US16884232

    申请日：2020-05-27

    Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

    Inventor： Sehwan Lee ,  Leesup Kim ,  Hyeonuk Kim ,  Jaehyeong Sim ,  Yeongjae Choi

    IPC: G06K9/62 ,  G06N3/04 ,  G06N3/063

    Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data of an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.

    Neural network method and apparatus
    10.
    发明授权
    Neural network method and apparatus 有权

    公开(公告)号：US10699160B2

    公开(公告)日：2020-06-30

    申请号：US16110664

    申请日：2018-08-23

    Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

    Inventor： Sehwan Lee ,  Leesup Kim ,  Hyeonuk Kim ,  Jaehyeong Sim ,  Yeongjae Choi

    IPC: G06K9/62 ,  G06N3/04 ,  G06N3/063

    Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.

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