公开(公告)号：US12113303B2

公开(公告)日：2024-10-08

申请号：US18073081

申请日：2022-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minseok Kim ,  Bumhee Bae ,  Jongwan Shim ,  Jeongnam Cheon

IPC: H01Q9/04 ,  H01Q1/24

CPC classification number: H01Q9/0414 ,  H01Q9/045 ,  H01Q9/0478 ,  H01Q1/243

Abstract: An electronic device is provided. The electronic device includes a millimeter wave (mmWave) antenna including a plurality of conductive patches, a wireless communication circuit, and a radio frequency (RF) cable electrically connecting the mmWave antenna to the wireless communication circuit. A first portion of the RF cable includes a base dielectric, a metal plate disposed on one surface of the base dielectric, and a shielding film including a first region in contact with the metal plate, a second region spaced apart from the metal plate by a first height, and a third region configured to connect the first region and the second region, at least one waveguide is formed by the second region, the third region, and a portion of the metal plate, and the wireless communication circuit transmits and/or receives RF signals corresponding to the plurality of conductive patches through the at least one waveguide.

公开(公告)号：US12040020B2

公开(公告)日：2024-07-16

申请号：US17854163

申请日：2022-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwangho Choi ,  Minseok Kim ,  Il Han Park ,  Jun-Yong Park ,  Joonsuc Jang

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/12 ,  G11C16/26

CPC classification number: G11C16/0433 ,  G11C16/08 ,  G11C16/12 ,  G11C16/26

Abstract: Disclosed is a memory device which includes a history table and communicates with a storage controller. A method of operating the memory device includes receiving a first request indicating a first core operation of a first memory block from the storage controller, determining whether history data of the first memory block have a first value or a second value, with reference to the history table, in response to the first request, when it is determined that the history data of the first memory block have the first value, performing the first core operation corresponding to a first type on the first memory block, and after performing the first core operation corresponding to the first type on the first memory block, updating the history data of the first memory block in the history table from the first value to the second value.

公开(公告)号：US11972111B2

公开(公告)日：2024-04-30

申请号：US18052350

申请日：2022-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyong Park ,  Minseok Kim ,  Jisu Kim ,  Ilhan Park ,  Doohyun Kim

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0629 ,  G06F3/0679

Abstract: A memory device for improving the speed of a program operation and an operating method thereof is provided. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate voltages for one or more program operations and a verify operation performed on the plurality of memory cells, a control logic configured to perform a control operation on the plurality of memory cells so that a first program and a second program loop are performed, a second program operation being performed based on a compensation voltage level determined based on a result of the first verify operation, and a plurality of bit lines connected to the memory cell array, wherein the first verify operation includes first even sensing and second even sensing on even-numbered bit lines, and first odd sensing and second odd sensing on odd-numbered bit lines.

公开(公告)号：US20230146741A1

公开(公告)日：2023-05-11

申请号：US18052350

申请日：2022-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyong Park ,  Minseok Kim ,  Jisu Kim ,  Ilhan Park ,  Doohyun Kim

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0629 ,  G06F3/0679

Abstract: A memory device for improving the speed of a program operation and an operating method thereof is provided. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate voltages for one or more program operations and a verify operation performed on the plurality of memory cells, a control logic configured to perform a control operation on the plurality of memory cells so that a first program and a second program loop are performed, a second program operation being performed based on a compensation voltage level determined based on a result of the first verify operation, and a plurality of bit lines connected to the memory cell array, wherein the first verify operation includes first even sensing and second even sensing on even-numbered bit lines, and first odd sensing and second odd sensing on odd-numbered bit lines.

公开(公告)号：US11562794B2

公开(公告)日：2023-01-24

申请号：US17324333

申请日：2021-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jisu Kim ,  Hyunggon Kim ,  Sangsoo Park ,  Joonsuc Jang ,  Minseok Kim

IPC: G06F11/10 ,  G06F11/07 ,  G06F11/30 ,  G06F11/14 ,  G11C16/26 ,  G11C11/56 ,  G11C16/04 ,  G11C16/24 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: Provided is a storage device that performs a read operation by using a time interleaved sampling page buffer. The storage device controls a sensing point in time, when bit lines of even page buffer circuits are sensed, and a sensing point in time, when bit lines of odd page buffer circuits are sensed, with a certain time difference, and performs an Even Odd Sensing (EOS) operation in a stated order of even sensing and odd sensing. The storage device performs a two-step EOS operation and performs a main sensing operation on a selected memory cell according to a result of the two-step EOS operation.

公开(公告)号：US20220093160A1

公开(公告)日：2022-03-24

申请号：US17346171

申请日：2021-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minseok Kim ,  Hyunggon Kim

IPC: G11C11/4091 ,  G11C11/4074 ,  G11C11/4099 ,  G11C11/4076

Abstract: In a method of counting the number of memory cells in a nonvolatile memory device, a measurement range and a plurality of measurement intervals of a measurement window for a cell counting operation are set to a first range and a plurality of first intervals, respectively. The plurality of measurement intervals are included in the measurement range. A first sensing operation is performed on first memory cells included in a first region of a memory cell array based on the measurement window. A first shifting operation for shifting the measurement window is performed while a width of the measurement range and a width of each of the plurality of measurement intervals are maintained. A second sensing operation is performed on the first memory cells based on the measurement window shifted by the first shifting operation. A final count value for the first memory cells is obtained based on a result of the first sensing operation and a result of the second sensing operation.

公开(公告)号：US11181962B2

公开(公告)日：2021-11-23

申请号：US16922091

申请日：2020-07-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeayoung Kwon ,  Kyunghun Kim ,  Minseok Kim ,  Youngkeun Oh

IPC: G06F1/3215 ,  G06F1/04 ,  G06F13/38 ,  G06F9/30 ,  G06F13/42

Abstract: A portable storage device includes nonvolatile memory devices to store data, a storage controller, and a bridge chipset. The bridge chipset is connected to a first connector of a host through a cable assembly, detects a resistance of the cable assembly, provides the storage controller with USB type information of the first connector based on the detected resistance, and after a USB connection is established with the host, provides the storage controller with USB version information associated with the established USB connection. The storage controller selects one of a plurality of operation modes based on the USB type information, the USB version information, and a request pattern indicating random or sequential access to the data from the host, selects clock signals having maximum frequencies in a range within a maximum power level associated with the selected operation mode, and performs power throttling based on the selected clock signals.

公开(公告)号：US12205646B2

公开(公告)日：2025-01-21

申请号：US17483088

申请日：2021-09-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minseok Kim ,  Joonsuc Jang ,  Hyunggon Kim ,  Seonyong Lee

IPC: G11C16/10 ,  G11C11/56 ,  G11C16/24 ,  G11C16/34

Abstract: A method of operating a memory device, the method including: performing a first program operation to form a plurality of first threshold voltage distributions; and performing a second program operation by using a coarse verification voltage and a fine verification voltage based on offset information to form a plurality of second threshold voltage distributions respectively corresponding to a plurality of program states from the plurality of first threshold voltage distributions, wherein the offset information includes a plurality of offsets that vary according to characteristics of the second threshold voltage distributions.

公开(公告)号：US20230154542A1

公开(公告)日：2023-05-18

申请号：US17984890

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungmin Park ,  Minseok Kim ,  Junyong Park ,  Suyong Kim ,  Ilhan Park

IPC: G11C16/14 ,  G11C16/08 ,  G11C16/24

CPC classification number: G11C16/14 ,  G11C16/08 ,  G11C16/24

Abstract: A non-volatile memory device includes a plurality of cell strings in a vertical direction, each of the plurality of cell strings including a plurality of memory cells respectively connected to a plurality of word lines, and an erase control transistor having a first end connected to at least one of both ends of plurality of memory cells and a second end connected to at least one of both ends of each of the plurality of cell strings, and a row decoder configured to apply a first bias voltage to the plurality of word lines in a first period in which an erase voltage applied to the second end of the erase control transistor increases to a target level and to apply a second bias voltage higher than the first bias voltage to at least some of the plurality of word lines in a second period after the first period.

公开(公告)号：US11636892B2

公开(公告)日：2023-04-25

申请号：US17346171

申请日：2021-06-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minseok Kim ,  Hyunggon Kim

IPC: G11C16/08 ,  G11C11/4091 ,  G11C11/4074 ,  G11C16/34 ,  G11C16/04 ,  G11C11/4076 ,  G11C11/4099 ,  G11C16/26

Abstract: In a method of counting the number of memory cells in a nonvolatile memory device, a measurement range and a plurality of measurement intervals of a measurement window for a cell counting operation are set to a first range and a plurality of first intervals, respectively. The plurality of measurement intervals are included in the measurement range. A first sensing operation is performed on first memory cells included in a first region of a memory cell array based on the measurement window. A first shifting operation for shifting the measurement window is performed while a width of the measurement range and a width of each of the plurality of measurement intervals are maintained. A second sensing operation is performed on the first memory cells based on the measurement window shifted by the first shifting operation. A final count value for the first memory cells is obtained based on a result of the first sensing operation and a result of the second sensing operation.