公开(公告)号：US20220301969A1

公开(公告)日：2022-09-22

申请号：US17505953

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunggyun NOH ,  GUN-HEE BAE ,  SANGWOO PAE ,  JINSOO BAE ,  DEOK-SEON CHOI ,  IL-JOO CHOI

IPC: H01L23/367 ,  H01L23/22 ,  H01L23/40

Abstract: A semiconductor package device includes a package substrate, an interposer on the package substrate, a semiconductor package on the interposer, and an under-fill between the interposer and the semiconductor package. The interposer includes at least one first trench at an upper portion of the interposer that extends in a first direction parallel to a top surface of the package substrate. The at least one first trench vertically overlaps an edge region of the semiconductor package. The under-fill fills at least a portion of the at least one trench.

公开(公告)号：US20230215779A1

公开(公告)日：2023-07-06

申请号：US17813417

申请日：2022-07-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunggyun NOH ,  Sangwoo PAE ,  Jinsoo BAE

IPC: H01L23/44 ,  H01L23/473 ,  H01L25/07 ,  H05K7/20

CPC classification number: H01L23/44 ,  H01L23/473 ,  H01L25/072 ,  H05K7/203

Abstract: Disclosed is a semiconductor module comprising a module substrate having a top surface and a bottom surface that are opposite to each other, a plurality of semiconductor packages on the top surface of the module substrate and arranged in a first direction parallel to the top surface of the module substrate, and a clip structure on the top surface of the module substrate and spaced apart from the plurality of semiconductor packages in the first direction. The clip structure includes a body part on the top surface of the module substrate and spaced apart from the plurality of semiconductor packages in the first direction, and a connection part that extends from the body part across a lateral surface of the module substrate onto the bottom surface of the module substrate.

公开(公告)号：US20240429111A1

公开(公告)日：2024-12-26

申请号：US18432463

申请日：2024-02-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunggyun NOH ,  JINSOO BAE ,  KEUN-HO RHEW ,  DEOK-SEON CHOI ,  Jongchan CHOE

IPC: H01L23/24 ,  H01L23/00 ,  H01L23/36 ,  H10B80/00

Abstract: A semiconductor memory module is disclosed. The semiconductor memory module includes a first substrate including a first corner, first semiconductor packages mounted on a lower surface of the first substrate, a second substrate disposed over the first substrate and including a second corner corresponding to the first corner, second semiconductor packages mounted on an upper surface of the second substrate, and a fixing structure in which the first corner and the second corner are fitted.

公开(公告)号：US20240258203A1

公开(公告)日：2024-08-01

申请号：US18459588

申请日：2023-09-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonhaeng LEE ,  Hyunggyun NOH ,  Sung-Mock HA

IPC: H01L23/48 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L25/0657 ,  H01L2225/06544

Abstract: A semiconductor device may include a substrate having a first surface and a second surface opposite to the first surface, a protection layer on the first surface of the substrate, metal layers in the substrate, extending in a first direction parallel to the first surface, and spaced apart from each other in a second direction perpendicular to the first surface, a via structure vertically penetrating the metal layers and the substrate, a circuit layer on the second surface of the substrate, and a connection terminal on a bottom surface of the circuit layer. Each of the metal layers may have a tetragonal or circular shape, when viewed in a plan view.

公开(公告)号：US20240194642A1

公开(公告)日：2024-06-13

申请号：US18523314

申请日：2023-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungmock HA ,  Hyunggyun NOH ,  Gunhee BAE ,  Jinsoo BAE ,  Iljoo CHOI

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L25/0652 ,  H01L23/3107 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5226 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/08146 ,  H01L2224/08245 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2924/181

Abstract: A semiconductor package includes a lower chip. A chip stacked structure is arranged on the lower chip. The chip stacked structure includes a plurality of upper chips. An underfill layer is disposed between the lower chip and the chip stacked structure and between the plurality of upper chips. A molding layer surrounds the underfill layer and the chip stacked structure. The lower chip has at least one lower trench positioned on an upper surface of the lower chip. At least one of the plurality of upper chips has at least one upper trench on an upper surface of the at least one of the plurality of upper chips.