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公开(公告)号：US09859492B2
公开(公告)日：2018-01-02
申请号：US15598605
申请日：2017-05-18
发明人： Jongchul Park , Hyungjoon Kwon , Inho Kim , Jongsoon Park
IPC分类号： H01L21/00 , H01L43/12 , H01L21/3213 , H01L27/22 , H01L27/108 , H01L43/08
CPC分类号： H01L43/12 , H01L21/32131 , H01L27/1087 , H01L27/222 , H01L43/08
摘要： A patterning method includes forming an etch-target layer on a substrate, forming mask patterns on the etch-target layer, and etching the etch-target layer using the mask patterns as an etch mask to form patterns spaced apart from each other. The etching process of the etch-target layer includes irradiating the etch-target layer with an ion beam, whose incident energy ranges from 600 eV to 10 keV. A recess region is formed in the etch-target layer between the mask patterns, and the ion beam is incident onto a bottom surface of the recess region at a first angle with respect to a top surface of the substrate and is incident onto an inner side surface of the recess region at a second angle with respect to the inner side surface of the recess region. The first angle ranges from 50° to 90° and the second angle ranges from 0° to 40°.
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公开(公告)号：US10038136B2
公开(公告)日：2018-07-31
申请号：US15350009
申请日：2016-11-11
发明人： Sungyoon Chung , Jinhye Bae , Hyungjoon Kwon , Jongchul Park , Wonjun Lee
摘要： A method of manufacturing a semiconductor device may include forming a material layer on a substrate, performing a selective oxidation process to form a capping oxide layer on a first surface of the material layer, wherein a second surface of the material layer is not oxidized, and etching the material layer through the second surface to form a material pattern. An etch rate of the capping oxide layer is less than an etch rate of the material layer. A semiconductor device may include a lower electrode on a substrate, a data storage part on a top surface of the lower electrode, an upper electrode on the data storage part, and a capping oxide layer arranged on at least a portion of a top surface of the upper electrode. The capping oxide layer may include an oxide formed by oxidation of an upper surface of the upper electrode.
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公开(公告)号：US09978932B2
公开(公告)日：2018-05-22
申请号：US15057101
申请日：2016-02-29
发明人： Hyungjoon Kwon , Sechung Oh , Vladimir Urazaev , Ken Tokashiki , Jongchul Park , Gwang-Hyun Baek , Jaehun Seo , Sangmin Lee
CPC分类号： H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L43/02 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.
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公开(公告)号：US09685606B2
公开(公告)日：2017-06-20
申请号：US14970163
申请日：2015-12-15
发明人： Jongchul Park , Hyungjoon Kwon , Inho Kim , Jongsoon Park
IPC分类号： H01L21/00 , H01L43/12 , H01L21/3213 , H01L27/22 , H01L27/108 , H01L43/08
CPC分类号： H01L43/12 , H01L21/32131 , H01L27/1087 , H01L27/222 , H01L43/08
摘要： A patterning method includes forming an etch-target layer on a substrate, forming mask patterns on the etch-target layer, and etching the etch-target layer using the mask patterns as an etch mask to form patterns spaced apart from each other. The etching process of the etch-target layer includes irradiating the etch-target layer with an ion beam, whose incident energy ranges from 600 eV to 10 keV. A recess region is formed in the etch-target layer between the mask patterns, and the ion beam is incident onto a bottom surface of the recess region at a first angle with respect to a top surface of the substrate and is incident onto an inner side surface of the recess region at a second angle with respect to the inner side surface of the recess region. The first angle ranges from 50° to 90° and the second angle ranges from 0° to 40°.
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公开(公告)号：US09496488B2
公开(公告)日：2016-11-15
申请号：US14070471
申请日：2013-11-01
发明人： Hyungjoon Kwon , Sechung Oh , Vladimir Urazaev , Ken Tokashiki , Jongchul Park , Gwang-Hyun Baek , Jaehun Seo , Sangmin Lee
CPC分类号： H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L43/02 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.
摘要翻译： 提供半导体器件及其制造方法。 半导体器件可以包括下部布线，穿过下部布线的上部布线，在下部布线和上部布线之间的交叉处提供的选择元件以及设置在选择元件和上部布线之间的存储元件。 每个存储元件可以包括具有大于底部宽度的顶部宽度的下部电极，以及包括堆叠在下部电极的顶表面上并且具有圆形边缘的多个磁性层的数据存储层。
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公开(公告)号：US09142757B2
公开(公告)日：2015-09-22
申请号：US14492419
申请日：2014-09-22
发明人： Jongchul Park , Hyungjoon Kwon , Joonkyu Rhee
摘要： A magnetic memory device may include a lower electrode on a substrate, a memory element on the lower electrode, an upper electrode on the memory element, and a protection spacer enclosing a portion of a side surface of the lower electrode and protruding laterally from the side surface of the lower electrode. The protection spacer may have a bottom surface that is positioned at a level higher than that of a bottom surface of the lower electrode.
摘要翻译： 磁存储器件可以包括衬底上的下电极，下电极上的存储元件，存储元件上的上电极，以及包围下电极的侧表面的一部分并从侧面侧向突出的保护间隔件 下电极的表面。 保护间隔件可以具有位于比下电极的底表面高的位置的底表面。
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