Nonvolatile memory device and operating method thereof
    1.
    发明授权
    Nonvolatile memory device and operating method thereof 有权
    非易失性存储器件及其操作方法

    公开(公告)号:US09349482B2

    公开(公告)日:2016-05-24

    申请号:US14639331

    申请日:2015-03-05

    CPC classification number: G11C16/3459 G11C11/5628 G11C16/107 G11C16/26

    Abstract: A method of programming a nonvolatile memory device is provided which includes applying a program voltage to selected ones of a plurality of memory cells; applying a selected one of a plurality of verification voltages after pre-charging bit lines connected to memory cells to which the program voltage is applied; sensing the memory cells to which the selected verification voltage is applied; selecting memory cells programmed to a target state referring to the sensing result and target state data; and determining whether programming of the selected memory cells is passed or failed.

    Abstract translation: 提供了一种编程非易失性存储器件的方法,其包括将编程电压施加到多个存储器单元中的选定的存储器单元; 在连接到应用了编程电压的存储单元的位线预充电之后施加多个验证电压中的选定的一个; 感测所选择的验证电压被施加到的存储器单元; 参考感测结果和目标状态数据选择被编程到目标状态的存储器单元; 以及确定所选择的存储器单元的编程是否通过或失败。

    Nonvolatile memory device and storage device including nonvolatile memory device

    公开(公告)号:US11062775B2

    公开(公告)日:2021-07-13

    申请号:US16846539

    申请日:2020-04-13

    Abstract: A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.

    Nonvolatile memory device and storage device including nonvolatile memory device

    公开(公告)号:US11227659B2

    公开(公告)日:2022-01-18

    申请号:US17021648

    申请日:2020-09-15

    Abstract: A storage device includes a nonvolatile memory device and a controller. The controller provides the nonvolatile memory device with first data, an address, and a program start command and provides the nonvolatile memory device with second data after the program start command is provided the nonvolatile memory device. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the program start command and to continue to perform, based on the first data and the second data, the program operation when the second data is provided to the nonvolatile memory device. The nonvolatile memory device is configured to perform a program and a verification read of a first program loop based on the first data, the verification read of the first program loop being performed using one verification voltage.

    Nonvolatile memory device and related method of operation
    5.
    发明授权
    Nonvolatile memory device and related method of operation 有权
    非易失存储器件及相关操作方法

    公开(公告)号:US08804422B2

    公开(公告)日:2014-08-12

    申请号:US13767166

    申请日:2013-02-14

    Abstract: A method of programming selected memory cells to a plurality of target states comprises applying a first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to at least one target state, applying a program voltage to the selected memory cells, and applying a second verification voltage lower than the first verification voltage to the selected memory cells to perform a verification read operation on memory cells programmed to the at least one target state, wherein the second verification voltage is provided in a specified program loop and subsequent program loops. The second verification voltage is set such that a number of slow bits in the at least one target state is different from the number of slow bits in another target state.

    Abstract translation: 将选择的存储器单元编程为多个目标状态的方法包括将第一验证电压施加到所选择的存储器单元以对被编程为至少一个目标状态的存储器单元执行验证读取操作,将程序电压施加到所选择的存储器单元 并且将低于第一验证电压的第二验证电压施加到所选择的存储器单元,以对被编程为至少一个目标状态的存储器单元执行验证读取操作,其中第二验证电压被提供在指定的程序循环中并且随后 程序循环。 第二验证电压被设置为使得至少一个目标状态中的慢比特数目与另一目标状态下的慢比特数不同。

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