公开(公告)号：US20190296144A1

公开(公告)日：2019-09-26

申请号：US16162510

申请日：2018-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Su Jin JUNG ,  Jeong Ho YOO ,  Jong Ryeol YOO ,  Young Dae CHO

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L21/768 ,  H01L21/308 ,  H01L29/36

Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the device including an active pattern protruding from a substrate; a plurality of gate structures each including a gate electrode and crossing the active pattern; and a source/drain region between the plurality of gate structures, wherein the source/drain region includes a high concentration doped layer in contact with a bottom surface of a recessed region in the active pattern, a first epitaxial layer in contact with an upper surface of the high concentration doped layer and a sidewall of the recessed region, and a second epitaxial layer on the first epitaxial layer, and the high concentration doped layer has a first area in contact with the bottom surface of the recessed region and a second area in contact with the sidewall of the recessed region, the first area being wider than the second area.

公开(公告)号：US20180350952A1

公开(公告)日：2018-12-06

申请号：US15878711

申请日：2018-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Yub JEON ,  Tae Yong KWON ,  Oh Seong KWON ,  Soo Yeon JEONG ,  Yong Hee PARK ,  Jong Ryeol YOO

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/10

CPC classification number: H01L29/66666 ,  H01L29/1037 ,  H01L29/4238 ,  H01L29/66553 ,  H01L29/7827

Abstract: A vertical tunnel field effect transistor (VTFET) including a fin structure protruding from a substrate including a source/drain region, an epitaxially-grown source/drain structure on the fin structure, a cap including pillar portions, the pillar portions covering side surfaces of the epitaxially-grown source/drain structure and partially covering side surfaces of a top portion of the fin structure, a gate insulator covering remaining portions of the side surfaces of the fin structure under the pillar portions of the cap, a work function metal gate on the gate insulator, and a separation pattern surrounding a bottom portion of a fin structure such that the work function metal gate is vertically between the cap and the separation pattern, the separation pattern electrically isolating the work function metal gate from the source/drain region, and a method of manufacturing the same may be provided.

公开(公告)号：US20240339498A1

公开(公告)日：2024-10-10

申请号：US18478280

申请日：2023-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ryeol YOO

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L27/092 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/4975 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a first epitaxial pattern connected to first bridge patterns sequentially stacked on a first region and penetrating through a first gate structure, the first epitaxial layer on a side of the first gate structure and including a first conductivity type impurity, a first silicide pattern on the first epitaxial pattern and overlapping the first bridge patterns in the first direction, a second epitaxial pattern connected to second bridge patterns sequentially stacked on a second region and penetrating through a second gate structure, the second epitaxial layer on a side of the second gate structure and including a second conductivity type impurity different from the first conductivity type impurity, and a second silicide pattern on the second epitaxial pattern and overlapping the second bridge patterns in the third direction, wherein the first silicide pattern and the second silicide pattern have stress properties different from each other.

公开(公告)号：US20240339378A1

公开(公告)日：2024-10-10

申请号：US18473665

申请日：2023-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ryeol YOO

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76805 ,  H01L21/76898 ,  H01L21/76804 ,  H01L23/5226 ,  H01L23/5286 ,  H01L27/092

Abstract: A semiconductor device includes a substrate including a substrate having a first side and a second side, a source/drain pattern on a fin-shaped pattern and connected to the fin-shaped pattern, a source/drain contact on the source/drain pattern and connected to the source/drain pattern, and a buried conductive pattern includes a first portion and a second portion, the second portion of between the first portion of the buried conductive pattern and a contact connecting via, at the first portion of the buried conductive pattern a width of the buried conductive pattern in a third direction decreases as the buried conductive pattern goes away from a back wiring line, and at the second portion of the buried conductive pattern, the width of the buried conductive pattern in the third direction increases, as the buried conductive pattern goes away from the back wiring line.

公开(公告)号：US20190109214A1

公开(公告)日：2019-04-11

申请号：US16197752

申请日：2018-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Yub JEON ,  Tae Yong KWON ,  Oh Seong KWON ,  Soo Yeon JEONG ,  Yong Hee PARK ,  Jong Ryeol YOO

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/78 ,  H01L29/423

Abstract: A vertical tunnel field effect transistor (VTFET) including a fin structure protruding from a substrate including a source/drain region, an epitaxially-grown source/drain structure on the fin structure, a cap including pillar portions, the pillar portions covering side surfaces of the epitaxially-grown source/drain structure and partially covering side surfaces of a top portion of the fin structure, a gate insulator covering remaining portions of the side surfaces of the fin structure under the pillar portions of the cap, a work function metal gate on the gate insulator, and a separation pattern surrounding a bottom portion of a fin structure such that the work function metal gate is vertically between the cap and the separation pattern, the separation pattern electrically isolating the work function metal gate from the source/drain region, and a method of manufacturing the same may be provided.