公开(公告)号：US20230122379A1

公开(公告)日：2023-04-20

申请号：US17879134

申请日：2022-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shin Cheol MIN ,  Keon Yong CHEON ,  Myung Dong KO ,  Yong Hee PARK ,  Sang Hyeon LEE ,  Dong Won KIM ,  Woo Seung SHIN ,  Hyung Suk LEE

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L29/66

Abstract: A semiconductor device includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern, a gate structure on the lower pattern and having a gate electrode and a gate insulating film that surround each of the sheet patterns, a gate capping pattern on the gate structure, a gate etching stop pattern between the gate capping pattern and the gate structure, a gate spacer along a sidewall of the gate capping pattern, a source/drain pattern on the gate structure, a gate contact through the gate capping pattern and connected to the gate electrode, upper surfaces of the gate contact and gate spacer being coplanar, and a source/drain contact on the source/drain pattern and connected to the source/drain pattern.

公开(公告)号：US20190198669A1

公开(公告)日：2019-06-27

申请号：US16128995

申请日：2018-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong Hee PARK ,  Myung Gil KANG ,  Young-Seok SONG ,  Keon Yong CHEON

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7827 ,  H01L29/0847 ,  H01L29/1037

Abstract: A vertical field effect transistor (VFET) including a first source/drain region, a channel structure upwardly protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including one or two first portions and one or more second portions, the one or two first portion extending in a first direction, and the one or more second portions connected to corresponding one or more of the one or more first portions and extending in a second direction, the second direction being different from the first direction, a gate structure horizontally surrounding the channel structure, and a second source/drain region upwardly on the channel structure may be provided.

公开(公告)号：US20190198648A1

公开(公告)日：2019-06-27

申请号：US16151511

申请日：2018-10-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Gil KANG ,  Ill Seo KANG ,  Yong Hee PARK ,  Sang Hoon BAEK ,  Keon Yong CHEON

IPC: H01L29/732 ,  H01L27/082 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/49 ,  H01L29/51 ,  H01L21/308 ,  H01L21/28

Abstract: A vertical bipolar transistor including a substrate including a first well of a first conductivity type and a second well of a second conductivity type different from the first conductivity type, the first well adjoining the second well, a first fin extending, from the first well, a second fin extending from the first well, a third fin extending from the second well, a first conductive region on the first fin, having the second conductivity type and configured to serve as an emitter of the vertical bipolar transistor, a second conductive region on the second fin, having the first conductivity type, and configured to serve as a base of the vertical bipolar transistor, and a third conductive region on the third fin, having the second conductivity type, and configured to serve as a collector of the vertical bipolar transistor may be provided.

公开(公告)号：US20200243682A1

公开(公告)日：2020-07-30

申请号：US16845591

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong Hee PARK ,  Myung Gil KANG ,  Young-Seok SONG ,  Keon Yong CHEON

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66

Abstract: A vertical field effect transistor (VFET) including a first source/drain region, a channel structure upwardly protruding from the first source/drain region and configured to serve as a channel, the channel structure having a two-dimensional structure in a plan view, the channel structure having an opening at at least one side thereof, the channel structure including one or two first portions and one or more second portions, the one or two first portion extending in a first direction, and the one or more second portions connected to corresponding one or more of the one or more first portions and extending in a second direction, the second direction being different from the first direction, a gate structure horizontally surrounding the channel structure, and a second source/drain region upwardly on the channel structure may be provided.

公开(公告)号：US20180350952A1

公开(公告)日：2018-12-06

申请号：US15878711

申请日：2018-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Yub JEON ,  Tae Yong KWON ,  Oh Seong KWON ,  Soo Yeon JEONG ,  Yong Hee PARK ,  Jong Ryeol YOO

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/10

CPC classification number: H01L29/66666 ,  H01L29/1037 ,  H01L29/4238 ,  H01L29/66553 ,  H01L29/7827

Abstract: A vertical tunnel field effect transistor (VTFET) including a fin structure protruding from a substrate including a source/drain region, an epitaxially-grown source/drain structure on the fin structure, a cap including pillar portions, the pillar portions covering side surfaces of the epitaxially-grown source/drain structure and partially covering side surfaces of a top portion of the fin structure, a gate insulator covering remaining portions of the side surfaces of the fin structure under the pillar portions of the cap, a work function metal gate on the gate insulator, and a separation pattern surrounding a bottom portion of a fin structure such that the work function metal gate is vertically between the cap and the separation pattern, the separation pattern electrically isolating the work function metal gate from the source/drain region, and a method of manufacturing the same may be provided.

公开(公告)号：US20170345897A1

公开(公告)日：2017-11-30

申请号：US15256136

申请日：2016-09-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Gil KANG ,  Seung Han PARK ,  Yong Hee PARK ,  Sang Hoon BAEK ,  Sang Woo LEE ,  Keon Yong CHEON ,  Sung Man WHANG

IPC: H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L29/41741 ,  H01L29/41758 ,  H01L29/42376 ,  H01L29/7827 ,  H01L29/7851

Abstract: A vertical field effect transistor is provided as follows. A substrate has a lower drain and a lower source arranged along a first direction in parallel to an upper surface of the substrate. A fin structure is disposed on the substrate and extended vertically from the upper surface of the substrate. The fin structure includes a first end portion and a second end portion arranged along the first direction. A bottom surface of a first end portion of the fin structure and a bottom surface of a second end portion of the fin structure overlap the lower drain and the lower source, respectively. The fin structure includes a sidewall having a lower sidewall region, a center sidewall region and an upper sidewall region. A gate electrode surrounds the center side sidewall region of the fin structure.

公开(公告)号：US20250151382A1

公开(公告)日：2025-05-08

申请号：US18663258

申请日：2024-05-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hye In CHUNG ,  Dong-Gwan SHIN ,  Yeon Ho PARK ,  Yong Hee PARK ,  Hong Seon YANG

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78

Abstract: A semiconductor device includes a first gate isolation structure. A second gate isolation structure is spaced apart from the first gate isolation structure in a first direction. A first active pattern is disposed between the first and second gate isolation structures. The first active pattern extends longitudinally in a second direction crossing the first direction. A second active pattern is disposed between the first and second gate isolation structures. The second active pattern extends longitudinally in the second direction and is spaced apart from the first active pattern in the first direction. Gate structures are disposed between the first and second gate isolation structures. The gate structures directly contact the first and second gate isolation structures. A length of the first gate isolation structure in the second direction is greater than a length of the second gate isolation structure in the second direction.

公开(公告)号：US20240038840A1

公开(公告)日：2024-02-01

申请号：US18125870

申请日：2023-03-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Gwan SHIN ,  Yong Hee PARK ,  Hong Seon YANG ,  Hye In CHUNG ,  Pan Kwi PARK

IPC: H01L29/06 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423 ,  H01L27/092

CPC classification number: H01L29/0673 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/42392 ,  H01L27/092

Abstract: A semiconductor device includes an active pattern with a first impurity having a first conductivity, first and second nanosheets on the active pattern, a gate electrode on the active pattern and surrounding each of the first and second nanosheets, a lower source/drain region on the active pattern, an uppermost surface of the lower source/drain region being lower than a lower surface of the second nanosheet, and the lower source/drain region being doped with a second impurity having the first conductivity, an upper source/drain region on the lower source/drain region, the upper source/drain region being doped with a third impurity having a second conductivity different from the first conductivity, and a gate insulation layer between the gate electrode and the lower and upper source/drain regions, the gate insulation layer being in contact with each of the lower and upper source/drain regions.

公开(公告)号：US20190109214A1

公开(公告)日：2019-04-11

申请号：US16197752

申请日：2018-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Yub JEON ,  Tae Yong KWON ,  Oh Seong KWON ,  Soo Yeon JEONG ,  Yong Hee PARK ,  Jong Ryeol YOO

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/78 ,  H01L29/423

Abstract: A vertical tunnel field effect transistor (VTFET) including a fin structure protruding from a substrate including a source/drain region, an epitaxially-grown source/drain structure on the fin structure, a cap including pillar portions, the pillar portions covering side surfaces of the epitaxially-grown source/drain structure and partially covering side surfaces of a top portion of the fin structure, a gate insulator covering remaining portions of the side surfaces of the fin structure under the pillar portions of the cap, a work function metal gate on the gate insulator, and a separation pattern surrounding a bottom portion of a fin structure such that the work function metal gate is vertically between the cap and the separation pattern, the separation pattern electrically isolating the work function metal gate from the source/drain region, and a method of manufacturing the same may be provided.