公开(公告)号：US20210320417A1

公开(公告)日：2021-10-14

申请号：US17215585

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Muyeol LEE ,  Jongyeon KIM ,  Eunsoo PARK ,  Woosup LEE ,  Sehwan CHOI ,  Jiwoo LEE

IPC: H01Q9/04 ,  H01Q1/22 ,  H01Q21/06 ,  H01Q1/48 ,  G01S13/76

Abstract: An electronic device including an antenna is provided. The electronic device includes a housing including a front surface plate, a rear surface plate, and a side surface member, a printed circuit board positioned within the housing, a first support structure, a second support structure, a patch antenna including a flexible printed circuit board disposed on one surface of the first support structure that faces the rear surface plate, a first conductive patch, and a second conductive patch disposed to be spaced apart from the first conductive patch, a conductive pattern disposed on one surface of the second support structure, and a wireless communication circuit electrically connected with the patch antenna and the conductive pattern, and the first conductive patch, the second conductive patch and the conductive pattern are fed from the wireless communication circuit.

公开(公告)号：US20230040041A1

公开(公告)日：2023-02-09

申请号：US17880527

申请日：2022-08-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suho JIN ,  Dongju LEE ,  Hyeok KWON ,  Jaeho KIM ,  Jongyeon KIM ,  Cheolwoo PARK

IPC: H04W52/52 ,  H04W52/36

Abstract: An electronic device may include: at least one communication processor, an RFIC, at least one power amplifier , and at least one converter and wherein the at least one communication processor is configured to: set a driving voltage, to be applied to a first power amplifier for amplifying a first RF signal provided from the RFIC among the at least one power amplifier, to be a first voltage, based on an APT mode, control at least part of the at least one converter to provide a first voltage, set based on the APT mode, to the first power amplifier during a transmission period of the first RF signal, and control at least part of the at least one converter to provide the first voltage to the first power amplifier during at least partial period of a remaining period in which no RF signal is transmitted, based on the occurrence of an event associated with audible noise.

公开(公告)号：US20220393380A1

公开(公告)日：2022-12-08

申请号：US17806665

申请日：2022-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongsik KIM ,  Seunghoon KIM ,  Jongyeon KIM ,  Muyeol LEE ,  Hyunsuk CHOI

IPC: H01R12/79 ,  H01R12/77 ,  G09F9/30

Abstract: An electronic device (ED) includes a first wireless communication path configured to enable wireless communication in a first frequency band, a second wireless communication path configured to enable wireless communication in a second frequency band, and a connector structure. The first wireless communication path includes a first frequency signal processing circuit, a flexible circuit board, a second frequency signal processing circuit, and a wireless communication modem. The second wireless communication path includes an antenna part formed by segmentation of a metal bezel, and the flexible circuit board. The connector structure includes a connector plug electrically connected to the flexible circuit board disposed in the ED, and a connector socket electrically connected to a printed circuit board disposed in the ED. The connector plug includes a connection pin configured to electrically connect a first plug pin disposed at a first side thereof and a second plug pin disposed at a second side.

公开(公告)号：US20230156613A1

公开(公告)日：2023-05-18

申请号：US18086642

申请日：2022-12-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeho KIM ,  Suho JIN ,  Hyeok KWON ,  Jongyeon KIM ,  Dongju LEE

IPC: H04W52/14 ,  H04W52/24

CPC classification number: H04W52/146 ,  H04W52/241

Abstract: A method of controlling power supply for amplifying a radio frequency (RF) signal includes: determining whether a power supply mode for supplying power from a power modulator of a communication apparatus to an amplifier for amplifying the RF signal is an envelope tracking (ET) mode for supplying power based on ET of the RF signal; when the power supply mode is the ET mode, determining whether a downlink block error rate in the ET mode and a downlink modulation method in the ET mode satisfy a first condition; when the first condition is satisfied, determining whether a full resource block (RB) in an uplink band is allocated to uplink data transmission; and when the full RB in the uplink band is allocated to uplink data transmission, switching the power supply mode to an average power tracking (APT) mode for supplying power based on average power of the RF signal.

公开(公告)号：US20160148909A1

公开(公告)日：2016-05-26

申请号：US15010438

申请日：2016-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsoo CHUNG ,  Jongyeon KIM ,  In-Young LEE ,  Tae-Je CHO

IPC: H01L25/065 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/02016 ,  H01L21/486 ,  H01L21/561 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012

Abstract: Provided are semiconductor packages having through electrodes and methods of fabricating the same. The method may include may include forming a wafer-level package including first semiconductor chips stacked on a second semiconductor chip, forming a chip-level package including fourth semiconductor chips stacked on a third semiconductor chip stacking a plurality of the chip-level packages on a back surface of the second semiconductor substrate of the wafer-level package, polishing the first mold layer of the wafer-level package and the first semiconductor chips to expose a first through electrodes of the first semiconductor chip, and forming outer electrodes on the polished first semiconductor chips to be connected to the first through electrodes, respectively.

公开(公告)号：US20150001685A1

公开(公告)日：2015-01-01

申请号：US14264123

申请日：2014-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Hyunsoo CHUNG ,  Jongyeon KIM ,  In-Young LEE ,  Tae-Je CHO

IPC: H01L21/48 ,  H01L21/02 ,  H01L23/538 ,  H01L25/00 ,  H01L25/07

CPC classification number: H01L25/0657 ,  H01L21/02016 ,  H01L21/486 ,  H01L21/561 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00012

Abstract: Provided are semiconductor packages having through electrodes and methods of fabricating the same. The method may include may include forming a wafer-level package including first semiconductor chips stacked on a second semiconductor chip, forming a chip-level package including fourth semiconductor chips stacked on a third semiconductor chip stacking a plurality of the chip-level packages on a back surface of the second semiconductor substrate of the wafer-level package, polishing the first mold layer of the wafer-level package and the first semiconductor chips to expose a first through electrodes of the first semiconductor chip, and forming outer electrodes on the polished first semiconductor chips to be connected to the first through electrodes, respectively.

Abstract translation: 提供了具有通孔的半导体封装及其制造方法。 该方法可以包括形成包括层叠在第二半导体芯片上的第一半导体芯片的晶片级封装，形成芯片级封装，芯片级封装包括堆叠在堆叠多个芯片级封装上的第三半导体芯片上的第四半导体芯片 晶片级封装的第二半导体衬底的后表面，抛光晶片级封装的第一模具层和第一半导体芯片，以暴露第一半导体芯片的第一贯穿电极，并在第一半导体芯片上形成外部电极 半导体芯片分别连接到第一贯通电极。