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公开(公告)号：US11440189B2
公开(公告)日：2022-09-13
申请号：US16710240
申请日：2019-12-11
发明人： Junghwan Lee , Daehun Kim , Hyunseok Hong
摘要： Provided are a method and robot device for sharing object data. The method, performed by a robot device, of sharing object data includes: obtaining sensing data related to objects in a certain space; classifying the obtained sensing data into a plurality of pieces of object data based on properties of the objects; selecting another robot device from among at least one other robot device; selecting object data to be provided to the selected robot device from among the classified plurality of pieces of object data; and transmitting the selected object data to the selected robot device, wherein the classifying of the sensing data into a plurality of pieces object data includes generating a plurality of data layers including the classified plurality of pieces of object data.
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公开(公告)号：US11666195B2
公开(公告)日：2023-06-06
申请号：US17177742
申请日：2021-02-17
发明人： Junghwan Lee , Daehun Kim , Saeyoung Kim , Soonhyuk Hong
CPC分类号： A47L11/4011 , B25J9/163 , B25J9/1653 , B25J9/1664 , B25J9/1697 , B25J11/0085 , B25J13/089 , A47L2201/04
摘要： A method of controlling a robot includes obtaining a first image and a second image of a plurality of objects, the first and second image being captured from different positions; obtaining, from the first and second images, a plurality of candidate positions corresponding to each of the plurality of objects, based on a capturing position of each of the first and second images and a direction to each of the plurality of objects from each capturing position; obtaining distance information between each capturing position and each of the plurality of objects in the first and second images by analyzing the first and second images; and identifying a position of each of the plurality of objects from among the plurality of candidate positions based on the distance information.
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公开(公告)号：US20220262819A1
公开(公告)日：2022-08-18
申请号：US17648134
申请日：2022-01-17
发明人： Jeeyong Kim , Junghwan Lee , Hwanyeol Park
IPC分类号： H01L27/11582 , H01L27/11519 , H01L27/11524 , H01L27/11529 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L23/00 , H01L25/065
摘要： An integrated circuit device includes: a semiconductor substrate having a cell region and a dummy region outside the cell region, a plurality of gate electrodes and a plurality of insulating layers, in the cell region, extending in first and second directions parallel to a main surface of the semiconductor substrate and alternately stacked in a third direction perpendicular to the main surface of the semiconductor substrate, the first and second directions crossing each other, and a plurality of dummy mold layers and a plurality of dummy insulating layers alternately stacked in the dummy region in the third direction, wherein a carbon concentration of an upper dummy mold layer of the plurality of dummy mold layers is less than a carbon concentration of a lower dummy mold layer of the plurality of dummy mold layers, the lower dummy mold layer being between the upper dummy mold layer and the main surface of the semiconductor substrate.
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公开(公告)号：US11334084B2
公开(公告)日：2022-05-17
申请号：US16734639
申请日：2020-01-06
发明人： Junghwan Lee , Daehun Kim , Hyunseok Hong , Junggap Kuk
摘要： Provided are an artificial intelligence (AI) system using a machine learning algorithm like deep learning, or the like, and an application thereof. A robotic cleaning apparatus that generates map data includes a communication interface comprising communication circuitry, a memory configured to store one or more instructions, and a processor configured to control the robotic cleaning apparatus by executing the one or more instructions. The processor is configured, by executing the one or more instructions, to control the robotic cleaning apparatus to: generate basic map data related to a cleaning space, and generate object information regarding at least one object in the cleaning space, the object information being generated based on information obtained by the robotic cleaning apparatus regarding the object in a plurality of different positions of the cleaning space, and including information about a type and a position of the object.
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5.发明授权Memory devices with vertical storage node bracing and methods of fabricating the same 有权具有垂直存储节点支撑的存储器件及其制造方法公开(公告)号：US09153639B2
公开(公告)日：2015-10-06
申请号：US13764243
申请日：2013-02-11
发明人： Junghwan Lee
IPC分类号： H01L49/02 , H01L27/08 , H01L27/108
CPC分类号： H01L28/40 , H01L27/0805 , H01L27/10808 , H01L27/10852 , H01L28/91
摘要： A memory device includes a substrate and a plurality of vertical storage nodes linearly spaced apart on the substrate along a first direction. The device further includes at least one support pattern abutting sidewalls of the storage nodes, the at least one support pattern having portions that bridge first pairs of adjacent ones of the storage nodes and openings therein that separate second pairs of adjacent ones of the storage nodes. First distances between the storage nodes of the respective first pairs may be greater than second distances between the storage nodes of the respective second pairs. Methods of fabricating such devices are also described.
摘要翻译： 存储器件包括衬底和沿着第一方向在衬底上线性间隔开的多个垂直存储节点。 所述装置还包括邻接所述存储节点的侧壁的至少一个支撑图案，所述至少一个支撑图案具有跨越所述存储节点中的第一对相邻存储节点和开口的部分，所述第一对存储节点中的开口与所述存储节点中相邻的第二对存储节点分开。 各个第一对的存储节点之间的第一距离可以大于相应的第二对的存储节点之间的第二距离。 还描述了制造这种装置的方法。
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公开(公告)号：US12125791B2
公开(公告)日：2024-10-22
申请号：US17209657
申请日：2021-03-23
发明人： Jeeyong Kim , Junghwan Lee
IPC分类号： H01L23/535 , H01L21/768 , H01L23/522 , H01L23/528 , H10B41/27 , H10B41/41 , H10B43/27 , H10B43/40
CPC分类号： H01L23/535 , H01L21/76805 , H01L21/76889 , H01L21/76895 , H01L23/5226 , H01L23/5283 , H10B41/27 , H10B41/41 , H10B43/27 , H10B43/40
摘要： A semiconductor device includes: a substrate including a memory cell region and a connection region; a plurality of gate lines vertically overlapping each other in the memory cell region of the substrate in a vertical direction, each gate line including a first metal; a stepped connection unit in the connection region and comprising a plurality of conductive pad regions, each conductive pad region including the first metal and integrally connected to a respective gate line of the plurality of gate lines; a plurality of contact structures vertically overlapping the stepped connection unit, each contact structure connected to a respectively corresponding conductive pad region of the plurality of conductive pad regions and including a second metal; and at least one metal silicide layer between at least one contact structure and the respectively corresponding conductive pad region.
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公开(公告)号：US20230301101A1
公开(公告)日：2023-09-21
申请号：US18046139
申请日：2022-10-12
发明人： Junghwan Lee , Yujin Kwon , Jaehong Yoo , Hyunmin Cho
IPC分类号： H01L27/11582 , H01L27/11556
CPC分类号： H01L27/11582 , H01L27/11556
摘要： An integrated circuit memory device includes a stack structure on a semiconductor substrate. The stack structure includes a first gate stack group, which includes a plurality of spaced-apart first gate electrodes, and a second gate stack group, which includes a plurality of spaced-apart second gate electrodes. The second gate stack group extends on the first gate stack group so that the first gate stack group extends between the second gate stack group and the substrate. A plurality of active channel structures are provided, which penetrate vertically through the second gate stack group as upper channel structures and through the first gate stack group as lower channel structures. A plurality of dummy channel structures are provided, which penetrate vertically through the second gate stack group but not through the first gate stack group.
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公开(公告)号：US11903199B2
公开(公告)日：2024-02-13
申请号：US17351486
申请日：2021-06-18
发明人： Jeeyong Kim , Junghwan Lee
摘要： A through via structure includes a through via and a capping pattern. The through via includes a metal pattern extending in a vertical direction, and a barrier pattern on a sidewall and a lower surface of the metal pattern. The capping pattern contacts an upper surface of the through via. A lowermost surface of an edge portion of the capping pattern is not higher than a lowermost surface of a central portion of the capping pattern.
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9.发明申请MEMORY DEVICES WITH VERTICAL STORAGE NODE BRACING AND METHODS OF FABRICATING THE SAME 有权具有垂直存储节点编码的存储器件及其制造方法公开(公告)号：US20130249053A1
公开(公告)日：2013-09-26
申请号：US13764243
申请日：2013-02-11
发明人： Junghwan Lee
IPC分类号： H01L49/02
CPC分类号： H01L28/40 , H01L27/0805 , H01L27/10808 , H01L27/10852 , H01L28/91
摘要： A memory device includes a substrate and a plurality of vertical storage nodes linearly spaced apart on the substrate along a first direction. The device further includes at least one support pattern abutting sidewalls of the storage nodes, the at least one support pattern having portions that bridge first pairs of adjacent ones of the storage nodes and openings therein that separate second pairs of adjacent ones of the storage nodes. First distances between the storage nodes of the respective first pairs may be greater than second distances between the storage nodes of the respective second pairs. Methods of fabricating such devices are also described.
摘要翻译： 存储器件包括衬底和沿着第一方向在衬底上线性间隔开的多个垂直存储节点。 所述装置还包括邻接所述存储节点的侧壁的至少一个支撑图案，所述至少一个支撑图案具有跨越所述存储节点中的第一对相邻存储节点和开口的部分，所述第一对存储节点中的开口与所述存储节点中相邻的第二对存储节点分开。 各个第一对的存储节点之间的第一距离可以大于相应的第二对的存储节点之间的第二距离。 还描述了制造这种装置的方法。
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