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    Memory device
    1.
    发明授权
    Memory device 有权

    公开(公告)号：US11302396B2

    公开(公告)日：2022-04-12

    申请号：US16862167

    申请日：2020-04-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Taehong Kwon ,  Youngsun Min ,  Daeseok Byeon ,  Kyunghwa Yun

    IPC: G11C8/00 ,  G11C16/04 ,  G11C16/08 ,  G11C16/26 ,  G11C16/30 ,  G11C16/24 ,  G11C16/10 ,  H01L27/1157

    Abstract: A memory device includes a memory cell array, a row decoder connected to the memory cell array by a plurality of string selection lines, a plurality of word lines, and a plurality of ground selection lines, and a common source line driver connected to the memory cell array by a common source line. The memory cell array is located in an upper chip, at least a portion of the row decoder is located in a lower chip, at least a portion of the common source line driver is located in the upper chip, and a plurality of upper bonding pads of the upper chip are connected to a plurality of lower bonding pads of the lower chip to connect the upper chip to the lower chip.

    NON-VOLATILE MEMORY DEVICE
    3.
    发明申请
    NON-VOLATILE MEMORY DEVICE 有权

    公开(公告)号：US20220277792A1

    公开(公告)日：2022-09-01

    申请号：US17746393

    申请日：2022-05-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyunghwa Yun ,  Chanho Kim ,  Pansuk Kwak

    IPC: G11C16/08 ,  G11C16/10 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11573

    Abstract: A memory device including: a memory cell array disposed in a first semiconductor layer, the memory cell array including a plurality of wordlines extended in a first direction and stacked in a second direction substantially perpendicular to the first direction; and a plurality of pass transistors disposed in the first semiconductor layer, wherein a first pass transistor of the plurality of pass transistors is disposed between a first signal line of a plurality of signal lines and a first wordline of the plurality of wordlines, and wherein the plurality of signal lines are arranged at the same level as a common source line.

    Semiconductor memory device
    4.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US10763278B2

    公开(公告)日：2020-09-01

    申请号：US16243837

    申请日：2019-01-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyunghwa Yun ,  Pansuk Kwak ,  Chanho Kim ,  Junghwa Lee

    IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/535 ,  H01L27/11573

    Abstract: A semiconductor memory device includes a substrate having a cell array region and a contact region, a stack structure including a plurality of gate electrodes on the cell array region and the contact region, a plurality of cell vertical channel structures extending through the stack structure on the cell array region, and a contact structure disposed beside of the stack structure on a top surface of the substrate and disposed along a line extending from the cell array region toward the contact region. The height of the contact structure on the cell array region is different from the height of the contact structure on the contact region.

    Memory device
    6.
    发明授权
    Memory device 有权

    公开(公告)号：US11289500B2

    公开(公告)日：2022-03-29

    申请号：US17001035

    申请日：2020-08-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyunghwa Yun ,  Pansuk Kwak ,  Chanho Kim ,  Dongku Kang

    IPC: G11C16/04 ,  H01L27/11573 ,  H01L27/1157 ,  G11C16/08 ,  G11C7/18 ,  H01L27/11524 ,  H01L27/11519 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11582

    Abstract: A memory device comprises a peripheral circuit region including a first substrate and circuit elements on the first substrate, the circuit elements including a row decoder, and a memory cell region including a cell array region and a cell contact region, wherein the cell array region includes wordlines, stacked on a second substrate on the peripheral circuit region, and channel structures extending in a direction perpendicular to an upper surface of the second substrate and penetrating the wordlines, wherein the cell contact region includes cell contacts connected to the wordlines and on both sides of the cell array region in a first direction parallel to the upper surface of the second substrate, the cell contacts including a first cell contact region and a second cell contact region, the first and second cell contact regions having different lengths to each other in the first direction, wherein each of the first and second cell contact regions includes first pads having different lengths than each other in the first direction, and second pads different from the first pads, wherein the cell contacts are connected to the wordlines in the first pads, wherein the number of the second pads included in the first cell contact region is greater than the number of the second pads included in the second cell contact region, and wherein the memory cell region includes a first metal pad and the peripheral circuit region includes a second metal pad, and the memory cell region and the peripheral circuit region are vertically connected to each other by the first metal pad and the second metal pad.

    Non-volatile memory device
    9.
    发明授权
    Non-volatile memory device 有权

    公开(公告)号：US11355194B2

    公开(公告)日：2022-06-07

    申请号：US16942299

    申请日：2020-07-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyunghwa Yun ,  Chanho Kim ,  Pansuk Kwak

    IPC: G11C16/08 ,  G11C16/10 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11573

    Abstract: A memory device including: a memory cell array disposed in a first semiconductor layer, the memory cell array including a plurality of wordlines extended in a first direction and stacked in a second direction substantially perpendicular to the first direction; and a plurality of pass transistors disposed in the first semiconductor layer, wherein a first pass transistor of the plurality of pass transistors is disposed between a first signal line of a plurality of signal lines and a first wordline of the plurality of wordlines, and wherein the plurality of signal lines are arranged at the same level as a common source line.

    Memory device
    10.
    发明授权
    Memory device 有权

    公开(公告)号：US11211391B2

    公开(公告)日：2021-12-28

    申请号：US16814491

    申请日：2020-03-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kyunghwa Yun ,  Pansuk Kwak ,  Chanho Kim ,  Dongku Kang

    IPC: G11C16/04 ,  H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  G11C5/02

    Abstract: A memory device includes a peripheral circuit region including a first substrate and circuit elements on the first substrate, the circuit elements including a row decoder; a cell array region including wordlines, stacked on a second substrate on the peripheral circuit region, and channel structures extending in a direction perpendicular to an upper surface of the second substrate and penetrating through the wordlines; and a cell contact region including cell contacts connected to the wordlines and on both sides of the cell array region in a first direction parallel to the upper surface of the second substrate, the cell contacts including a first cell contact region and a second cell contact region, the first and second cell contact regions having different lengths to each other in the first direction. Each of the first and second cell contact regions includes first pads having different lengths to each other in the first direction and second pads different from the first pads, and the cell contacts are connected to the wordlines in the first pads. The number of the second pads included in the first cell contact region is greater than the number of the second pads included in the second cell contact region.

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