公开(公告)号：US11652090B2

公开(公告)日：2023-05-16

申请号：US16885391

申请日：2020-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Jun Bae ,  Dong Kyu Kim ,  Jin-Woo Park ,  Seok Hyun Lee

IPC: H01L25/10 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L25/0652 ,  H01L25/50 ,  H01L2225/0651 ,  H01L2225/06506 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2225/1035 ,  H01L2225/1041

Abstract: A semiconductor package includes a first redistribution layer. A plurality of posts is disposed on the first redistribution layer. A semiconductor chip is disposed on the first redistribution layer between the plurality of posts. A second redistribution layer is formed on the plurality of posts and the semiconductor chip. A first memory stack is disposed on the second redistribution layer. A height of each of the plurality of posts extends from an upper surface of the first redistribution layer to a lower surface of the second redistribution layer.

公开(公告)号：US11967549B2

公开(公告)日：2024-04-23

申请号：US17509046

申请日：2021-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Park ,  Jong Youn Kim ,  Min Jun Bae

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/42

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/42 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02371 ,  H01L2224/024 ,  H01L2224/08235

Abstract: A semiconductor package includes a redistribution substrate having first and second surfaces opposed to each other, and including an insulation member, a plurality of redistribution layers on different levels in the insulation member, and a redistribution via having a shape narrowing from the second surface toward the first surface in a first direction; a plurality of UBM layers, each including a UBM pad on the first surface of the redistribution substrate, and a UBM via having a shape narrowing in a second direction, opposite to the first direction; and at least one semiconductor chip on the second surface of the redistribution substrate, and having a plurality of contact pads electrically connected to the redistribution layer adjacent to the second surface among the plurality of redistribution layers.

公开(公告)号：US11177205B2

公开(公告)日：2021-11-16

申请号：US16454304

申请日：2019-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Park ,  Jong Youn Kim ,  Min Jun Bae

IPC: H01L23/49 ,  H01L23/31 ,  H01L23/36 ,  H01L23/538 ,  H01L23/498 ,  H01L23/367 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/42

Abstract: A semiconductor package includes a redistribution substrate having first and second surfaces opposed to each other, and including an insulation member, a plurality of redistribution layers on different levels in the insulation member, and a redistribution via having a shape narrowing from the second surface toward the first surface in a first direction; a plurality of UBM layers, each including a UBM pad on the first surface of the redistribution substrate, and a UBM via having a shape narrowing in a second direction, opposite to the first direction; and at least one semiconductor chip on the second surface of the redistribution substrate, and having a plurality of contact pads electrically connected to the redistribution layer adjacent to the second surface among the plurality of redistribution layers.

公开(公告)号：US11373980B2

公开(公告)日：2022-06-28

申请号：US16744623

申请日：2020-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Youn Kim ,  Dong Kyu Kim ,  Jin-Woo Park ,  Min Jun Bae ,  Gwang Jae Jeon

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/544

Abstract: A semiconductor package includes a first semiconductor chip including a first surface and a second surface which face each other, an alignment pattern formed on the first surface, a first redistribution layer arranged on the first surface of the first semiconductor chip, a second redistribution layer arranged on the second surface of the first semiconductor chip, and electrically connected with the semiconductor chip, and a first dielectric layer including the alignment pattern between the first redistribution layer and the semiconductor chip, the alignment pattern overlapping the first surface of the first semiconductor chip.

公开(公告)号：US20210020608A1

公开(公告)日：2021-01-21

申请号：US16744623

申请日：2020-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Youn KIM ,  Dong Kyu Kim ,  Jin-Woo Park ,  Min Jun Bae ,  Gwang Jae Jeon

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/544 ,  H01L23/00

Abstract: A semiconductor package includes a first semiconductor chip including a first surface and a second surface which face each other, an alignment pattern formed on the first surface, a first redistribution layer arranged on the first surface of the first semiconductor chip, a second redistribution layer arranged on the second surface of the first semiconductor chip, and electrically connected with the semiconductor chip, and a first dielectric layer including the alignment pattern between the first redistribution layer and the semiconductor chip, the alignment pattern overlapping the first surface of the first semiconductor chip.