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1.发明公开公开(公告)号：US20240282670A1
公开(公告)日：2024-08-22
申请号：US18221696
申请日：2023-07-13
发明人： Myung Yang , Wonhyuk Hong , Myunghoon Jung , Jongjin Lee , Jaejik Baek , Kang-ill Seo
IPC分类号： H01L23/48 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L23/481 , H01L21/823412 , H01L21/823418 , H01L21/823475 , H01L21/823481 , H01L27/088 , H01L29/0673 , H01L29/0847 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要： A semiconductor device includes: at least one transistor comprising source/drain regions and 1st gate structure; a contact isolation layer below the 1st gate structure; and a backside contact plug connected to at least one of the 1st source/drain regions, wherein the backside contact plug is formed below the 1st source/drain region and extended to a region below the 1st gate structure, and isolated from the 1st gate structure by the contact isolation layer.
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公开(公告)号：US20230361032A1
公开(公告)日：2023-11-09
申请号：US17969440
申请日：2022-10-19
发明人： Wonhyuk HONG , Jaemyung Choi , Jaejik Baek , Janggeun Lee , Myunghoon Jung , Taesun Kim , Kang-ill Seo
IPC分类号： H01L23/528 , H01L21/768
CPC分类号： H01L23/5283 , H01L21/76885 , H01L21/76865 , H01L23/5226
摘要： A semiconductor device includes a dielectric layer, a plurality of vias formed in the dielectric layer, an adhesion layer deposited on a top surface of the dielectric layer, and a plurality of metal lines. A first metal line of the plurality of metal lines includes a first recess formed at a bottom surface of the first metal line such that a first section of the first metal line directly contacts the first via and a second section of the first metal line defined by the first recess does not directly contact the first via or the dielectric layer in which the first via is formed.
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3.发明公开公开(公告)号：US20240079330A1
公开(公告)日：2024-03-07
申请号：US18169905
申请日：2023-02-16
发明人： Wonhyuk Hong , Jongjin Lee , Jaejik Baek , Myunghoon Jung , Kang-ill Seo
IPC分类号： H01L23/528 , H01L21/84 , H01L27/12
CPC分类号： H01L23/5286 , H01L21/84 , H01L27/12 , H01L21/823475
摘要： Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a lower insulating structure, a transistor on the lower insulating structure, the transistor including a source/drain region, a power rail structure in the lower insulating structure, and a power contact structure that is on the power rail structure and electrically connects the source/drain region to the power rail structure. The power contact structure may include a lower portion that is in the power rail structure.
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公开(公告)号：US20230326858A1
公开(公告)日：2023-10-12
申请号：US17887203
申请日：2022-08-12
发明人： Buhyun HAM , Byounghak Hong , Myunghoon Jung , Wonhyuk Hong , Seungyoung Lee , Kang-ill Seo
IPC分类号： H01L23/535 , H01L23/528 , H01L23/532 , H01L21/768
CPC分类号： H01L23/535 , H01L23/5286 , H01L23/53209 , H01L23/53257 , H01L23/5329 , H01L21/76897
摘要： Provided is a semiconductor chip architecture including a wafer, a front-end-of-line (FEOL) layer on a first side of the wafer, the FEOL layer including a semiconductor device and an interlayer dielectric (ILD) structure on the semiconductor device on the first side of the wafer, a shallow trench isolation (STI) structure in the wafer, and the wafer, a middle-of-line (MOL) layer provided on the first FEOL layer, the MOL layer including a contact and a via connected to the contact, an insulating layer on the first side of the wafer and adjacent to the via in a horizontal direction, a power rail penetrating the wafer from a second side of the wafer opposite to the first side, wherein the via extends through the ILD structure, the STI structure, and the wafer in a vertical direction to contact the power rail.
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5.发明公开公开(公告)号：US20240072048A1
公开(公告)日：2024-02-29
申请号：US18184901
申请日：2023-03-16
发明人： Seungchan Yun , Seungmin Song , Myunghoon Jung , Keumseok Park , Kang-ill Seo
IPC分类号： H01L27/088 , H01L21/8234 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L27/088 , H01L21/823412 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/66545 , H01L29/66553 , H01L29/775 , H01L29/78696
摘要： An integrated circuit device may comprise an upper transistor that is on a substrate. The upper transistor may comprise an upper channel region. The integrated circuit device may further comprise a lower transistor that is between the substrate and the upper transistor. The lower transistor may comprise a lower channel region. The integrated circuit device may further include an integrated insulator that is between the lower channel region and the upper channel region. The integrated insulator may comprise an outer layer and an inner layer in the outer layer, wherein the inner layer and the outer layer comprise different materials.
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公开(公告)号：US20230275021A1
公开(公告)日：2023-08-31
申请号：US17738393
申请日：2022-05-06
发明人： BYOUNGHAK HONG , Jeonghyuk Yim , Inchan Hwang , Gilhwan Son , Seungyoung Lee , Saehan Park , Janggeun Lee , Myunghoon Jung , Seungchan Yun , Buhyun Ham , Kang-ILL Seo
IPC分类号： H01L23/528 , H01L23/522 , H01L21/302 , H01L21/8234
CPC分类号： H01L23/5286 , H01L23/5283 , H01L23/5226 , H01L21/302 , H01L21/823475
摘要： Integrated circuit devices may include a transistor, a passive device, a substrate extending between the transistor and the passive device and a power rail. The passive device may be spaced apart from the substrate. Each of the passive device and the power rail may have a first surface facing the substrate, and the first surface of the passive device is closer than the first surface of the power rail to the substrate.
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